Hritik Brajawar

Software Engineer

India1 yr 11 mos experience

Key Highlights

Proficient in Static Timing Analysis and VLSI design.
Strong automation skills using Python and scripting languages.
Experience in developing and validating complex engineering tools.

Stackforce AI infers this person is a Software Engineer specializing in VLSI and automation in the SaaS industry.

Contact

Skills

Core Skills

Static Timing AnalysisVery-large-scale Integration (vlsi)Problem Solving

Other Skills

VerilogPython (Programming Language)Digital ElectronicsPerlLTSpiceHTMLCSSJavaScriptMicrosoft OfficeLinuxPhoto EditingPhotographySimulinkAdobe PhotoshopMicrosoft Word

About

I am passionate about leveraging technology to solve complex problems and drive innovation in the field.

Experience

1 yr 11 mos

Total Experience

1 yr 11 mos

Average Tenure

1 yr 11 mos

Current Experience

Cadence design systems

4 roles

Software Engineer II

Promoted

Jan 2026 – Present · 5 mos · Noida, Uttar Pradesh, India · On-site

Software Engineer I

Jul 2024 – Jan 2026 · 1 yr 6 mos · Noida, Uttar Pradesh, India · On-site

Intern-Software Engineering

Jul 2023 – Jun 2024 · 11 mos · Noida, Uttar Pradesh, India · On-site

Software - Litmus
1. Developed specifications for Litmus-specific hierarchical, signoff, and lint SDC checks
2. Validated and debugged Litmus-specific clock mapping, SDC checks, CDC checks, and other functionalities; conducted extensive regression testing and reported bugs to the R&D team
3. Automated various tasks by developing scripts in Expect, CSH, and TCL
4. Evaluated and validated Litmus licenses to ensure compliance and functionality

Static Timing AnalysisVerilogPython (Programming Language)Digital ElectronicsVery-Large-Scale Integration (VLSI)

Trainee

Apr 2022 – Aug 2022 · 4 mos · Noida, Uttar Pradesh, India · Remote

1. Software - Tempus
2. Automated various tasks by developing scripts PERL
3. Validated the tool regressively and reported the bugs to R&D

Problem SolvingPerl

Maven silicon

Trainee

Jul 2021 – Jul 2021 · 0 mo · Bengaluru, Karnataka, India · Remote

Very-Large-Scale Integration (VLSI)Verilog

Genisup india pvt. ltd.

Trainee

May 2021 – Jul 2021 · 2 mos · Bengaluru, Karnataka, India · Remote

1. Software- LT Spice.
2. Designed NOT, NOR, and NAND gates using CMOS technology.
3. Verified the truth table of the designed gates and calculated parameters such as rise time, fall time, and propagation delay.
4. Worked on designing SRAM, pre-decoder, synchronous latch, and other components.

Very-Large-Scale Integration (VLSI)LTSpice

400 kv substation uttar pradesh power transmission corporation ltd.

Trainee

Jul 2020 – Sep 2020 · 2 mos · Agra, Uttar Pradesh, India · On-site

1. Learnt about the purpose of a single-line diagram in a substation and various components involved, including circuit breakers, transformers, wave traps, reactors, lightning arrestors, insulators,
and more.
2. Visited in Yard, where the distribution of electricity takes place and learn, how Distribution takes place in various Substation.