Jyotiprakash Pani — Software Engineer
• Working as an RTL Design Engineer with more than 1 year of experience. • Good understanding of RTL design, coding, simulation, debugging, synthesis, and putting the design onto FPGA boards. • Always open to learning, exploring, and working with new technologies in the VLSI domain.
Stackforce AI infers this person is a VLSI Design Engineer with strong RTL design capabilities.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 6 mos
Skills
- Rtl Design
- Very-large-scale Integration (vlsi)
Career Highlights
- Over 1 year of experience in RTL design.
- Proficient in debugging and synthesizing designs.
- Eager to learn new technologies in VLSI.
Work Experience
CoreEL Technologies
RTL Design Engineer (1 yr 10 mos)
Silicon Institute of Technology (SIT), Bhubaneswar
Student (3 yrs 8 mos)
Education
Bachelor of Technology - BTech at Silicon Institute of Technology (SIT), Bhubaneswar
12th at UPENDRA NATH COLLEGE SORO
10th at M. D HIGH SCHOOL DHUSURI