Humera S

Software Engineer

Bengaluru, Karnataka, India6 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in Physical Design and Verification.
  • Proficient in RTL Design and Analog Circuit Design.
  • Strong background in VLSI Design and Embedded Systems.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and Verification.

Contact

Skills

Other Skills

Physical designPhysical verificationSTAECOSynopsis ICC2Star RCPrime TimeCadence VirtuousoRTL DesignAnalog Circuit DesignARM ArchitectureVerilogPSpiceEclipseC (Programming Language)

About

Currently working as an Application Engineer in Sign-off at Synopsys, Bangalore.

Experience

6 yrs 10 mos
Total Experience
2 yrs 3 mos
Average Tenure
5 yrs 11 mos
Current Experience

Synopsys inc

3 roles

Applications Engineer Sr I/Staff in Signoff

Promoted

Aug 2024Present · 1 yr 10 mos

Applications Engineer, Sr I/Staff in Parasitic Extraction

Promoted

Feb 2023Jul 2024 · 1 yr 5 mos

Applications Engineer, II in Parasitic Extraction

Jun 2020Feb 2023 · 2 yrs 8 mos

Chipedge technologies pvt ltd

Physical Design Trainee

Sep 2019Feb 2020 · 5 mos · India

Winglobal tek pvt ltd

RTL Designer (Intern)

Aug 2018Feb 2019 · 6 mos · India

Education

Bangalore Institute of Technology, BANGALORE-560 004

Master of Technology - MTech — VLSI Design and Embedded Systems

Jan 2017Jan 2019

PES UNIVERSITY, BANGLORE

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 2013Jan 2017

New Horizon College, Kasturinagar, NGEF Layout, Bangalore-43

PUC (Pre-University College)

Jan 2011Jan 2013

Amara Jyothi English School

Jan 2005Jan 2011

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