Bala Durga prasad Bokka — Software Engineer
I have done M.Tech in Electronics and Instrumentation from NIT rourkela where as a part of my thesis, I have implemented and prototyped a SHA3-512 accelerator on the Xilinx- Artix 7 FPGA. I improved the latency of the accelerator by implementing parallel processing technique in the architecture. I worked as intern in the platform engineering department of SiFive and worked on the project called FireSim which is a FPGA accelerated Hardware simulation Platform. Here I have learned and worked on new HDL called Chisel for rapid RTL development. Worked on the Target to Host bridges.Target is the custom RTL running on FPGA and Host is the PC. The bridge will provides Communication aid between these two. Currently I am working in verification team of Synopsys Hyderabad, where I am responsible to work on the architecture and its verification and debugging issues of the industry leading SERDES IP's for PCIe 5,6, ethernet etc. I am very passionate to work on micro architecture, RTL design, Verification and FPGA prototyping.
Stackforce AI infers this person is a Hardware Design Engineer with expertise in FPGA and RTL development.
Location: West Godavari, Andhra Pradesh, India
Experience: 4 yrs 1 mo
Skills
- Verilog
- Chisel Rtl
Career Highlights
- Prototyped SHA3-512 accelerator on Xilinx FPGA.
- Contributed to FireSim project for FPGA hardware simulation.
- Expertise in verification of SERDES IPs for PCIe and Ethernet.
Work Experience
Synopsys Inc
ASIC Digital Design Sr Engr (2 yrs 4 mos)
ASIC Digital Design Engr II (10 mos)
Technical Intern (7 mos)
SiFive
Intern (5 mos)
Education
M.Tech at National Institute of Technology Rourkela
Bachelor of Technology - BTech at SRKR Engineering College