Mahesh G. — Software Engineer
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductor industry. Technical Skillsets: • Hardware Description Languages: System Verilog and Verilog. • Verification Methodology: UVM and OVM. • Platforms: UNIX and Windows. • Protocols: HBM, Ethernet, LPDDR4, DFI and UPI.
Stackforce AI infers this person is a semiconductor design verification expert with a focus on ASIC and memory technologies.
Location: Bengaluru, Karnataka, India
Experience: 8 yrs 7 mos
Skills
- Interoperability
- Verdi
- Application-specific Integrated Circuits (asic)
- Ethernet
Career Highlights
- Experienced in semiconductor design verification methodologies.
- Proficient in System Verilog and UVM for ASIC projects.
- Strong problem-solving skills demonstrated in diverse roles.
Work Experience
Synopsys Inc
ASIC Digital Design Staff Engr. (4 yrs 7 mos)
Rambus
Verification Contractor (5 mos)
Tech Mahindra Cerium Pvt Ltd
Verification Engineer (Contractor) (2 yrs 6 mos)
Atria Logic Inc.
Verification Engineer (3 yrs 1 mo)
iRobokid Mumbai
Instructor (11 mos)
CollegeBol.com
Campus Ambassador (1 mo)
Education
Master of Technology - MTech at KJ Somaiya College of Engineering, Vidyavihar
Bachelor's degree at Pillai College of Engineering