Abhinit Saurabh

Software Engineer

San Diego, California, United States6 yrs 3 mos experience

Highly Stable

Key Highlights

4.5+ years in Analog and Mixed Signal Circuit Design.
Expert in DDR/HBM-PHY interface IP design and verification.
Strong mentoring and leadership skills demonstrated in team settings.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog and Mixed Signal Circuit Design.

Contact

Skills

Core Skills

Equivalence CheckingAnalog And Mixed Signal Circuit DesignAnalog Circuit Design

Other Skills

ESPDigital Circuit DesignHigh Speed DesignShell ScriptingReliability SimulationsLow-power DesignMATLABMonte Carlo SimulationMixed-Signal Integrated CircuitsAgilent ADSAnalog-to-Digital Converters (ADC)Radio Frequency (RF) EngineeringRF DesignPower Management Integrated CircuitsHigh Speed Interfaces

About

Hi, I'm Abhinit, a Graduate student in the Department of Electrical & Computer Engineering at University of California, San Diego specializing in Electronic Circuits & Systems. I have 4.5+ years of work experience as an Analog and Mixed Signal Circuit Design Engineer in DDR/HBM-PHY interface IP. I have worked on design, optimization and verification of TX, RX & other macros in advanced process nodes. I'm skilled at Schematic entry, Testbench creation & simulation, Equivalence checking and Reliability simulations. I have a strong working knowledge of Analog and Digital CMOS Circuit design and I'm very good at problem solving and debugging. I have mentored interns & new joiners in my team with design flows, tool usages and assignments demonstrating my mentoring, communication and leadership skills as well as my ability as a team player. EDA Expertise: • Circuit Design Tools: Synopsys Custom-Compiler, bbSim (circuit analysis using Hspice, Finesim & XA Spice Simulators) • Logical Equivalency Tools: Synopsys ESP, Formality & RNM • Reliability Analysis Tools: Synopsys CCK, EMIR and Aging • Shell Scripting - bash • Cadence Virtuoso I'm motivated to learn, grow and excel in semiconductor industry. Please feel free to message me or send me an email to discuss about anything interesting related to analog circuits or semiconductor industry in general.

Experience

6 yrs 3 mos

Total Experience

3 yrs 1 mo

Average Tenure

1 mo

Current Experience

Qualcomm

Senior Engineer, Mixed Signal SERDES

May 2026 – Present · 1 mo · San Diego, CA · On-site

Synopsys inc

4 roles

Analog and Mixed Signal Circuit Design Intern

Jun 2025 – Sep 2025 · 3 mos · Boxborough, MA · On-site

Developed ESP & Formality equivalency setups and performed equivalency checks between circuit and RTL for multiple LPDDR6 PHY Macros. Helped in fixing several mismatches by keeping key stakeholders informed.

Equivalence CheckingESP

A&MS Circuit Design Engineer ll

Promoted

Feb 2023 – Aug 2024 · 1 yr 6 mos · On-site

Optimized and verified functionality of multiple DDR/HBM-PHY Macros across different projects in advanced process nodes to meet the specifications. Worked on the following Macros:
∗ High-Speed Driver Backend (involving blocks like r2rdac, high speed level-shifter, calibrated & terminated I/O pad driver). Improved the jitter and fixed the pull-down driver calibration issue.
∗ Control Signal Transmitter (involving blocks like se2diff, serializer and uncalibrated & unterminated I/O pad driver). Improved the jitter, fixed the duty cycle and optimized the driver impedance.
∗ Loopback Receiver (involving blocks like sense-amplifier, schmitt-trigger, attenuator, level-shifter and deserializer). Fixed the attenuator attenuation, control level shifter writability failure and schmitt trigger spec failures.

Digital Circuit DesignHigh Speed DesignAnalog and Mixed Signal Circuit Design

A&MS Circuit Design Engineer l

Jul 2020 – Feb 2023 · 2 yrs 7 mos · On-site

Optimized and verified functionality of multiple DDR/HBM-PHY Macros across different projects in advanced process nodes to meet the specifications. Worked on the following Macros:
∗ High-Speed Driver Backend (involving blocks like r2rdac, high speed level-shifter, calibrated & terminated I/O pad driver). Improved the jitter and fixed the pull-down driver calibration issue.
∗ Control Signal Transmitter (involving blocks like se2diff, serializer and uncalibrated & unterminated I/O pad driver). Improved the jitter, fixed the duty cycle and optimized the driver impedance.
∗ Loopback Receiver (involving blocks like sense-amplifier, schmitt-trigger, attenuator, level-shifter and deserializer). Fixed the attenuator attenuation, control level shifter writability failure and schmitt trigger spec failures.

Equivalence CheckingShell ScriptingAnalog and Mixed Signal Circuit Design

Intern (A&MS Circuit Design)

Jan 2020 – Jul 2020 · 6 mos · On-site

Designed CMOS circuits from scratch like Inverter, NAND Gate, Schmitt-trigger, Level-Shifter, Comparator, Phase Detector, Phase Interpolator and Amplifiers.
Ramped up on circuit design & analysis tools like Custom-Compiler, bbSim (using Hspice, Finesim & XA spice simulators), on monte carlo simulations, on various reliability flows like EMIR, Aging, CCK and on logical equivalency flows like ESP, Formality and RNM.

Reliability SimulationsAnalog Circuit Design