P

Pallavi K

Software Engineer

Bengaluru, Karnataka, India2 yrs 7 mos experience

Key Highlights

  • Expert in Mixed-Signal Integrated Circuits.
  • Strong foundation in analog circuit design.
  • Proficient in multiple programming languages.
Stackforce AI infers this person is a Mixed-Signal Verification Engineer with expertise in analog circuit design.

Contact

LinkedIn

Skills

Core Skills

Mixed-signal Integrated CircuitsMixed Signal Verification

Other Skills

SerDesAnalog Circuit DesignVerilogSmt8 (V93000)CadenceC (Programming Language)Python (Programming Language)EngineeringMATLABC++Proteus

About

Currently working on SerDes mixed signal/co-sim verification at Synopsys. worked on cadence virtuoso schematic and layout editor. skills : analog circuit design, verilog, C, C++, matlab...

Experience

2 yrs 7 mos
Total Experience
--
Average Tenure
--
Current Experience

Synopsys inc

2 roles

AMS verification engineer (Co-Sim)

Nov 2023 – Present · 2 yrs 7 mos

Mixed-Signal Integrated Circuits

Intern(co-sim/mixed signal verification)

Oct 2022 – Oct 2023 · 1 yr

SerDesMixed signal verification

Education

KLE Technological University - Hubballi (India)

Bachelor of Engineering - BE — Electronics and communication

Jan 2018 – Jan 2022

Tungal Schools

PUC — PCMB

Jun 2016 – Apr 2018

Chaitanya School Mudalgi

SSLC

Jun 2015 – Apr 2016

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