M

MANIKANTA N

Software Engineer

Mysore, Karnataka, India6 yrs 10 mos experience

Key Highlights

  • Expert in Memory Layout Design for advanced nodes.
  • Proficient in Mentor Graphics and Cadence tools.
  • Strong background in SRAM and custom compiler design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Memory Layout and SRAM technologies.

Contact

LinkedIn

Skills

Core Skills

Layout DesignMemory DesignHigh Speed Sram Design

Other Skills

Mentor GraphicsLayout ToolsInterpersonal SkillsMemory TestJob SkillsEngineeringWorking ExperienceFloor PlansCMOSIC LayoutDebuggingVirtuosoSRAMPhysical VerificationCommunication

Experience

6 yrs 10 mos
Total Experience
--
Average Tenure
--
Current Experience

Synopsys inc

2 roles

A&MS Layout Design Engineer II

Promoted

Dec 2022 – Present · 3 yrs 6 mos · Hyderabad, Telangana, India · Hybrid

Mentor GraphicsLayout ToolsLayout DesignMemory Design

Memory layout design engineer (Contractor)

Jun 2021 – Jul 2022 · 1 yr 1 mo · Hyderabad, Telangana, India · Remote

Layout ToolsInterpersonal SkillsLayout Design

Amd

Memory layout design engineer (Contractor)

Jul 2022 – Dec 2022 · 5 mos · Bangalore Urban, Karnataka, India · On-site

  • Worked on lower nodes such as TSMC 3nm, 5nm Finfet. Designed various custom compiler on High speed SRAM memory.
Mentor GraphicsLayout ToolsMemory DesignHigh Speed SRAM Design

Phyelements llp

Layout Design Engineer

Aug 2019 – Dec 2022 · 3 yrs 4 mos · Bengaluru, Karnataka, India · On-site

Layout ToolsInterpersonal SkillsLayout Design

Education

ATME College of Engineering, Mysuru

Bachelor's degree

Aug 2015 – Jun 2018

Vidyavardhaka polytechnic

Diploma of Education

Jun 2012 – May 2015

Sudarshan Vidya samsthe

SSLC

Jun 2011 – Apr 2012

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