Narasimha Raju Sarikonda — Software Engineer

I am an enthusiastic and dedicated Physical Design Engineer with a strong foundation in VLSI design, digital electronics, and CMOS concepts. Having completed a comprehensive Physical Design course at Takshila Institute of VLSI Technologies and an internship at DRDO (RCI), I have gained hands-on experience with Synopsys IC Compiler, LTSpice, Verilog programming, and physical design methodologies. My expertise lies in: 1) Physical Design Flow (RTL to GDSII) – Floor Planning, Placement, CTS, Routing, Timing Closure 2) Physical Verification – DRC, LVS. 3) Synopsys IC Compiler – Block-level PnR, congestion handling, and timing analysis 4) Timing Constraints & STA – Ensuring optimized design performance 5) TCL Scripting – Automating design processes for efficiency I have worked on projects involving 32nm and 28nm technology nodes, solving real-world challenges like IR drop, congestion, and DRC violations. Passionate about semiconductor technology, I am eager to contribute my skills to innovative in cutting-edge VLSI design projects.

Stackforce AI infers this person is a VLSI Physical Design Engineer with expertise in semiconductor technology.

Location: Hyderabad, Telangana, India

Experience: 9 mos