Avinash Kumar Singh

Software Engineer

Arrah, Bihar, India4 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in ASIC Physical Design and Static Timing Analysis.
  • Strong academic background with MTech from IISc Bangalore.
  • Hands-on experience with advanced VLSI design tools.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in ASIC and semiconductor technologies.

Contact

LinkedIn

Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

TclDigital VLSI designAnalog VLSI designSemiconductor DeviceDigital system design using FPGATCADCadence VirtuosoMATLABXilinx VivadoProbe StationElectrostatic Discharge (ESD)

Experience

4 yrs 8 mos
Total Experience
2 yrs 4 mos
Average Tenure
3 yrs 10 mos
Current Experience

Cisco

ASIC Physical Design Engineer

Aug 2022 – Present · 3 yrs 10 mos · Bengaluru, Karnataka, India

TclStatic Timing AnalysisPhysical Design

Msdlab @ indian institute of science

Mtech student

Jul 2021 – May 2022 · 10 mos · Karnataka, India · On-site

  • I was associated with this lab when I was doing my master’s project under Prof. Mayank Shrivastava.

Education

Indian Institute of Science (IISc)

Master of Technology - MTech — Microelectronics and VLSI design

Jan 2020 – Jan 2022

International Institute of Information Technology, Bhubaneswar

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2016 – Jan 2020

The Avadh school Lucknow

Intermediate — Science

Aug 2013 – Aug 2015

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