Akash Verma — Software Engineer
As a Microelectronics fresher, i possess a strong academic background in digital Vlsi design, including knowledge of Verilog HDL and VLSI architecture principles. i worked on designing and simulating digital circuits using industry-standard tools such as Cadence and Xilinx . My skills include RTL coding , static timing analysis ,functional verification, static timing analysis and synthesis. I am eager to apply my theoretical knowledge and contribute to cutting-edge VLSI projects.
Stackforce AI infers this person is a VLSI design engineer with a focus on digital electronics and circuit simulation.
Location: Lucknow, Uttar Pradesh, India
Experience: 1 yr 10 mos
Skills
- Very-large-scale Integration (vlsi)
- Static Timing Analysis
Career Highlights
- Strong academic background in digital VLSI design.
- Proficient in RTL coding and static timing analysis.
- Eager to contribute to cutting-edge VLSI projects.
Work Experience
AMD
Silicon Design Engineer 2 (1 yr 10 mos)
Co-op intern (7 mos)
Education
Master of Engineering - MEng at Birla Institute of Technology and Science, Pilani - Goa Campus
Bachelor of Technology - BTech at Rajkiya engineering college kannauj
High School Diploma at Saraswati Vidhya Mandir Biswan-Sitapur
