Amey Kulkarni

Software Engineer

San Jose, California, United States15 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 8 years of experience in functional verification.
  • Expert in pre-silicon verification using SystemVerilog and UVM.
  • Proven track record in DRAM and NVMe subsystem verification.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in functional verification and design.

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Skills

Core Skills

Functional VerificationDram Verification

Other Skills

SystemVerilogUVMVerilogDRAMNVMeAXIAHBPerlPythonC++VCSC#WPFVisual StudioC

About

Functional verification engineer with over 8 years' experience in block level and full chip functional verification. Specialties: Pre-silicon functional verification using SystemVerilog and UVM, and C++. Experience in block level verification for NVMe subsystem and DRAM controller and PHY for LPDDR2, LPDDR3, LPDDR4, DDR3 and DDR4. Experience in writing scripts using Perl and Bash.

Experience

15 yrs 3 mos
Total Experience
2 yrs 6 mos
Average Tenure
3 yrs 3 mos
Current Experience

Microsoft

Senior Silicon Engineer

Mar 2023Present · 3 yrs 3 mos · Santa Clara, California, United States

Fungible, inc., acquired by microsoft

MTS Verification Engineer

Sep 2017Feb 2023 · 5 yrs 5 mos · Santa Clara

Sk hynix memory solutions inc.

Senior Verification Engineer

Feb 2013Sep 2017 · 4 yrs 7 mos · San Francisco Bay Area

  • Verifying the Status Manager block in the NVMe subsystem of the next generation NVMe SSD controllers.
  • Successfully created and debugged multiple agents for custom interfaces
  • Created block level testbench including multiple AXI, AHB and custom interface agents and advanced scoreboard
  • Created and executed testplan for Status Manager verification
  • Worked with designers to clarify NVMe standard implementation details, especially related to Interrupt processing.
  • Responsible for bring-up and function verification for DRAM sub-system in four generations of client and enterprise SSD controllers.
  • Integrated Verilog and Denali VIP DRAM memory models into multiple testbenches.
  • Improved productivity by implementing dynamic run-time selection of different DRAM configurations using UVM classes and interfaces.
  • Implemented and debugged initialization sequences for multiple JEDEC DDR devices -- DDR3, DDR4, LPDDR2, LPDDR3, LPDDR4.
  • Drove DRAM subsystem bringup, using Cadence, Synopsis and Renesas IPs.
  • Formulated and implemented test plans for verifying DDR Controller and PHY features, such as dynamic frequency scaling, multi-port arbitration, low-power data retention modes, etc.
  • Working knowledge of AMBA AHB, APB and AXI protocols.
SystemVerilogUVMVerilogDRAMNVMeAXI+5

Amd

Design Engineer II

Oct 2011Dec 2012 · 1 yr 2 mos · Sunnyvale, CA

  • Doing pre-Si verification in the execution-scheduler unit. Responsibilities:
  • Simulation debug, especially in the machine check architecture (MCA); using VCS.
  • Extensive work in functional coverage, using SystemVerilog.
  • Maintaining and enhancing fake models, using C++ and SystemVerilog.
  • Modifying random stimulus generation constraints and running special regressions for feature-specific testing, using Perl and Python scripts.
  • Attended SystemVerilog Testbench and UVM training workshops held by Synopsys.
SystemVerilogC++VCSFunctional Verification

Nvidia

2 roles

Enterprise Software Engineering Intern/Co-op

Feb 2011Sep 2011 · 7 mos · Santa Clara, CA

  • Developed code to get ‘Git’ commit information and send it to a BizTalk server instance
  • Worked on a Visual Studio Add-In UI (WPF) for internal development automation.
C#WPFVisual Studio

Intern

Jun 2010Aug 2010 · 2 mos

  • Coded a gate-keeper utility between a third-party review tool and internal databases.
  • Deployed Microsoft's System Center Operations Manager.
  • Performed housekeeping procedures on databases.

Infosys

Trainee Software Engineer

Mar 2009Jun 2009 · 3 mos

  • Completed basic and intermediate training including C, Java, operating systems, RDBMS (Oracle 10g) using PL/SQL.;
  • Database Management Project: Wrote PL/SQL scripts to generate and populate a database, and tested for different types of queries.
  • Course Management Software: Wrote a simple command-line software package for adding students and courses, evaluating the results of the students, and displaying the same.
CJavaPL/SQL

Education

Stony Brook University

MS — Electrical Engineering

Jan 2009Jan 2011

Savitribai Phule Pune University

Bachelor

Jan 2004Jan 2008

Vishwakarma Institute of Technology, Pune

Bachelor of Engineering — Electronics and Telecommunication

Jan 2004Jan 2008

Modern Junior College, Pune

Jan 2002Jan 2004

Modern High School

Jan 1992Jan 2002

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