Amey Kulkarni — Software Engineer
Functional verification engineer with over 8 years' experience in block level and full chip functional verification. Specialties: Pre-silicon functional verification using SystemVerilog and UVM, and C++. Experience in block level verification for NVMe subsystem and DRAM controller and PHY for LPDDR2, LPDDR3, LPDDR4, DDR3 and DDR4. Experience in writing scripts using Perl and Bash.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in functional verification and design.
Location: San Jose, California, United States
Experience: 15 yrs 3 mos
Skills
- Functional Verification
- Dram Verification
Career Highlights
- Over 8 years of experience in functional verification.
- Expert in pre-silicon verification using SystemVerilog and UVM.
- Proven track record in DRAM and NVMe subsystem verification.
Work Experience
Microsoft
Senior Silicon Engineer (3 yrs 3 mos)
Fungible, Inc., Acquired by Microsoft
MTS Verification Engineer (5 yrs 5 mos)
SK hynix memory solutions inc.
Senior Verification Engineer (4 yrs 7 mos)
AMD
Design Engineer II (1 yr 2 mos)
NVIDIA
Enterprise Software Engineering Intern/Co-op (7 mos)
Intern (2 mos)
Infosys
Trainee Software Engineer (3 mos)
Education
MS at Stony Brook University
Bachelor at Savitribai Phule Pune University
Bachelor of Engineering at Vishwakarma Institute of Technology, Pune
at Modern Junior College, Pune
at Modern High School