Amrutha b Manigar

Software Engineer

Bengaluru, Karnataka, India2 yrs 4 mos experience

Key Highlights

Expert in Universal Verification Methodology (UVM) and SystemVerilog.
Proficient in debugging and developing subsystem tests.
Experience in semiconductor industry with AMD.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in UVM and SystemVerilog.

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Skills

Core Skills

Functional VerificationUniversal Verification Methodology (uvm)SystemverilogRtl Coding

Other Skills

Python (Programming Language)uvm ralRISC-VProgram ManagementVerdiCover propertyDebuggingTdl flow developmentDMAReactive slaveTb architectureTest planTest caseC (Programming Language)C++

About

SDE 2, working in AMD for the graphics team. Working on developing subsystem tests for Audio co processor block. Good debugging knowledge, proficient in SV and UVM. Expertised in AMD specific flow porting.

Experience

2 yrs 4 mos

Total Experience

1 yr 10 mos

Average Tenure

6 mos

Current Experience

Amd

Silicon design engineer 2

Nov 2025 – Present · 6 mos · Bengaluru, Karnataka, India · Hybrid

Design verification

Smartsoc solutions pvt ltd

2 roles

Design Verification Engineer

Jan 2024 – Nov 2025 · 1 yr 10 mos

Worked at AMD for Graphics team, focusing on the audio co-processor. Proficient in debugging using Verdi and experienced in writing cover properties. Contributed to the integration of the repeaters block and the development of AMD specific flow environment.

Python (Programming Language)Functional Verification

Intern trainee design Verification Engineer

Apr 2023 – Dec 2023 · 8 mos

Working as a design verification engineer and trainer at Smartsoc Solutions, with a deep knowledge of hardware description languages like Verilog and SystemVerilog, as well as verification methodologies such as UVM (Universal Verification Methodology) and assertion-based verification (SVA - SystemVerilog Assertions). Additionally, I have a fundamental understanding of formal verification. I have knowledge on UVM RAL (Register Abstraction Layer) based verification.
In terms of specific IPs , I have knowledge in USART, I2C, SPI, and UART, and AMBA protocols, including AHB, APB, and AXI.
Some of my notable completed projects include:
1) Verification of an APB memory module using a UVM testbench.
2) Verification of the UART protocol using a UVM testbench.
3) Verification of a Synchronous FIFO (First-In, First-Out) module using a SystemVerilog testbench.

Universal Verification Methodology (UVM)uvm ral