Asha Jyothi Tadi — Software Engineer
Enthusiastic Physical Design and STA Engineer with comprehensive knowledge on physical design implementation,timing analysis,physical verification,IR,TCL,Perl,Shell scripting. Have an experience of working in technology node ranging from 3nm-40nm. Hands on experience in physical designing tools like Cadence-Genus,innovus,Tempus & Synopsys - ICC2,Primetime,Tweaker ECO and Redhawk, Calibre. Strong Engineering professional with B.tech in ECE from RGUKT NUZVID with 93%.
Stackforce AI infers this person is a Physical Design Engineer with expertise in semiconductor design and verification.
Location: Visakhapatnam, Andhra Pradesh, India
Experience: 4 yrs 8 mos
Skills
- Physical Design
Career Highlights
- Expertise in physical design implementation across multiple technology nodes.
- Proficient in industry-standard tools like Cadence and Synopsys.
- Strong academic background with a B.Tech in ECE.
Work Experience
Samsung Semiconductor
Senior Engineer (1 yr 7 mos)
Arm
Consultant (1 yr 3 mos)
Synapse Design Inc.
Physical Design and STA Engineer (1 yr 3 mos)
Adept Chips Services Pvt Ltd
Physical Design and STA Engineer (1 yr 10 mos)
Education
Bachelor of Technology - BTech at RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
PUC at RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
SSC at Z P Girls High School,Anaparthi
