Ashutosh Kumar Agrawal

Software Engineer

Bengaluru, Karnataka, India0 mo experience

Key Highlights

  • Expert in IP and SoC verification methodologies.
  • Proficient in RTL design using Verilog HDL.
  • Strong foundation in VLSI design and verification.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in digital systems.

Contact

Skills

Core Skills

Ip VerificationSoc VerificationRtl Design

Other Skills

AHB2APB BridgeAMBAAssemblerC (Programming Language)Cadence XceliumCode CoverageDVT Eclipse IDEDigital Coherent Optical SystemsDigital DesignsFiber-optic communicationsGNU Compiler Collection (GCC)GitGitlabHardware Description LanguageIntel Quartus Prime

Experience

0 mo
Total Experience
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Average Tenure
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Current Experience

Innophase inc.

VLSI Design Verification

Jul 2022Present · 3 yrs 11 mos · Bengaluru, Karnataka, India · On-site

  • InnoPhase Inc.
  • 5G Team - H64
  • IP Verification → CSS Verification → SoC Verification (Tentative)
VHDLSystemVerilogIP VerificationSoC VerificationVerification IP

Maven silicon

Internship Trainee

Aug 2021Sep 2021 · 1 mo · Karnataka, India

  • AHB2APB Bridge RTL Design using Verilog HDL
Verilog HDLRTL DesignAHB2APB Bridge

Education

Indian Institute of Technology, Kanpur

Master of Technology - MTech

Sep 2020Jul 2022

Institute of Engineering & Management (IEM)

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2016Jan 2020

Central Board of Secondary Education

PCM

Jan 2015Present

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