Chaitanya Kumar Madineni — Software Engineer
Experienced Physical Design Engineer with a demonstrated history of working in the wireless industry.Strong knowledge in handling Hard Macros in various tools like Cadence and ICC2 . Skilled in TCL, Linux, Cadence Encounter, Perl, and Physical Design.Strong fundamentals in static timing analysis.Strong Knowledge in various fields like Physical Verification, Conformal Low Power , Formal Verification and PDN along with Physical Design skills. Strong engineering professional with a Bachelor of Technology - BTech focused in Electrical and Electronics Engineering from National Institute of Technology Calicut.
Stackforce AI infers this person is a Physical Design Engineer with expertise in VLSI and wireless technology.
Location: Bengaluru, Karnataka, India
Experience: 11 yrs 10 mos
Skills
- Physical Design
- Graphics Hardware Engineering
- Timing Closure
Career Highlights
- Expertise in Physical Design and Timing Closure.
- Proficient in multiple EDA tools including Cadence and ICC2.
- Strong foundation in static timing analysis and verification.
Work Experience
Intel Corporation
Graphics Hardware Engineer (3 yrs 9 mos)
Qualcomm
Senior Physical Design Engineer (9 mos)
Physical Design Engineer (2 yrs)
Associate physical design engineer (1 yr 5 mos)
Student
Former Student (3 yrs 11 mos)
Education
Bachelor of Technology - BTech at National Institute of Technology Calicut
High School at Jawahar Navodaya Vidyalaya - JNV
