K

Karthik N S

Design Manager

Bengaluru, Karnataka, India22 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 9+ years in high speed mixed signal design
  • Expertise in advanced semiconductor technologies
  • Led design for multiple high-speed interfaces
Stackforce AI infers this person is a Semiconductor Design Expert with a focus on high-speed mixed signal and IO design.

Contact

Skills

Core Skills

High Speed Mixed Signal DesignHigh Voltage DesignCircuit Design

Other Skills

LPDDR2SD3.0e-MMCMIPI HSISLIM BUSI2CUSIM interfaceDDR3LVDSSignal integrityDDR2Calibration circuitsUSBGeneral purpose IOsMixed Signal

About

9+ years of experience in circuit design with expertise in High speed mixed signal designs like LVDS Transmitter/Receiver, DDR3/DDR2/LPDDR2 IOs and other circuits such as USB, USIM, High voltage interfaces and other mobile interfaces. Have handled designs from specifications and architecture definitions to implementation. Handled complete IO portfolio in latest technologies (14nm, 28nm) Specialties: High speed mixed signal design, High voltage design

Experience

22 yrs 5 mos
Total Experience
7 yrs 5 mos
Average Tenure
14 yrs 4 mos
Current Experience

Intel corporation

Design Lead

Feb 2012Present · 14 yrs 4 mos · Bangalore

  • Currently working on mobile interfaces which include LPDDR2, SD3.0, e-MMC, MIPI HSI, SLIM BUS, I2C, USIM interface. Expertise in High speed interfaces lilke DDR3/LPDDR2 and LVDS. Handling complete IO portfoilo for latest technologies (28nm, 14nm) including bus definition/ chip level IO integration concepts. Other responsibilities include handling system level requirements and signal integrity issues.
High speed mixed signal designHigh voltage designLPDDR2SD3.0e-MMCMIPI HSI+5

Synopsys

R & D Engineer Sr

Oct 2009Jan 2012 · 2 yrs 3 mos · Bangalore

  • Have been involved in designing DDR3/DDR2/LPDDR2 IOs/Calibration circuits in technology nodes 65nm-40nm. The design challenge was to derive a circuit to meet the requirements of all 3 modes (DDR3/DDR2/LPDDR2) of operation in a single IP!
DDR3DDR2LPDDR2Calibration circuitsCircuit Design

Nxp semiconductors

Technical Lead

Nov 2003Sep 2009 · 5 yrs 10 mos · Bengaluru, Karnataka, India

  • Worked as Technical Lead involved in design of High speed circuits like LVDS Receiver/Transmitter.
  • During the initial phase have also designed various General purpose IOs and USB IOs in technology nodes ranging from 180nm-40nm.
LVDSUSBGeneral purpose IOsCircuit Design

Education

JSS Academy Of Technical Education

B.E — Electronics & Communication

Jan 1999Jan 2003

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