Ky Dang — Software Engineer
Logic Design Engineer / Design Verification Engineer (mainly Design Verification) with 2 years of experience: + Proficient in Hardware Description Language (Verilog) and Hardware Verification Language (SystemVerilog, UVM) + Proficient in scripting language (Bash, Shell, Tcl, Perl) + Proficient in AMBA Specification (APB, AHB, AXI) + Proficient in computer peripheral communication protocols (UART, SPI, I2C) + Proficient in Synopsys IPs / Subsystem & VIPs + Build VIP from ground-up and Verify Video Processing IP (V-by-One) + Experience in DDR IP (DDR5 IP), Highspeed SerDes Video Processing IP (V-by-One IP, HDMI Subsystem), Highspeed SerDes Display Interface (MIPI DSI-2 Subsystem, LVDS Transmitter), Mobile Storage Host Controller (SD/eMMC + UHS/UHS-II Interface) + Experience with Synopsys CoreTools (coreConsultant, coreAssembler) + SoC Sub-system Integration and Verification + SoC Top Level testbench Integration and Verification Engineer's Degree at Ho Chi Minh City University of Technology: + Major: Electrical and Electronics Engineering + Graduation Classification: Good + Academic Incentive Scholarship & OISP Scholarship
Stackforce AI infers this person is a Semiconductor Design Verification Engineer with expertise in SoC and IP verification.
Location: Ho Chi Minh City, Vietnam
Experience: 3 yrs 7 mos
Skills
- Design Verification
- Hardware Verification
- Soc Verification
- Verification Environment Development
- Verification Ip Development
- Asic Design
Career Highlights
- Proficient in Verilog and SystemVerilog for design verification.
- Experience in building Verification IP from scratch.
- Strong background in SoC integration and verification.
Work Experience
AMD
Design Verification Engineer (1 yr 4 mos)
Synopsys Inc
SOC Engineering, Senior Design Verification Engineer (3 mos)
Uniquify Viet Nam
Logic Design Engineer / Design Verification Engineer (2 yrs 1 mo)
Logic Design Intern (2 mos)
Education
Engineer's degree at Ho Chi Minh City University of Technology
