Peter Wohl — CEO

I create uniquely innovative products by viewing stubborn challenges as unique opportunities. My work spawns HW and SW development, from machine learning to massively parallel systems, from design to test. I had a leading role in the development of several pioneering products and technologies: the first hardware-microcoded LISP machine, the first 64-bit microprocessor, the first simulation of artificial neural networks on message-passing parallel processors, the first hybrid PowerPC/x86 microprocessor, the first widely deployed combinational scan compression, DFTMAX, and, more recently, the first multi-level, sequential scan compression, SEQ. Combining my expertise in ATPG, AI, multi-core and cloud computing, I lead the development of next-generation ATPG products (https://www.synopsys.com/implementation-and-signoff/test-automation.html). MSc in EE and a PhD in CS. Worked in design and test for over 20 years. Taught Computer Architecture, Programming Languages, and Digital System Test at the Illinois Institute of Technology and the University of Vermont. Previously worked at National Semiconductor, and IBM, and co-founded ATTI; now with Synopsys. Hold over 20 patents and presented over 30 papers. Current interests: high-performance ATPG, BIST, and scan compression.

Stackforce AI infers this person is a leader in EDA and microprocessor technology development.

Location: Williston, Vermont, United States

Experience: 33 yrs 5 mos