Subhadip Kundu — Software Engineer

As a Senior Principal Software Engineer at Cadence with a PhD from IIT Kharagpur, I specialize in the intersection of EDA algorithm development and high-stakes silicon debug for advanced nodes like 3nm SoCs. My expertise bridges the gap between C++ software architecture—having developed state-of-the-art logic and chain diagnosis tools like DFTMAX Ultra—and real-world silicon bring-up where conventional solutions often fail. I have successfully accelerated over 20 advanced nodes to productization by building custom debug platforms that handle design marginality and PVT corner variance through volume silicon learning. Beyond my technical contributions in DFT automation and fault modeling, I am deeply embedded in the semiconductor ecosystem, currently serving my third consecutive year as the Technical Program Co-Chair for the 10th IEEE ITC India.

Stackforce AI infers this person is a leader in semiconductor EDA with a focus on silicon debug and algorithm development.

Location: Bengaluru, Karnataka, India

Experience: 16 yrs 4 mos