Priyanka Aggarwal

Software Engineer

Noida, Uttar Pradesh, India8 yrs 8 mos experience
Most Likely To Switch

Key Highlights

  • Experienced Design Manager with VLSI expertise.
  • Proficient in verification engineering and digital electronics.
  • Strong educational background with an M.Tech in VLSI Design.
Stackforce AI infers this person is a VLSI Design and Verification Engineer with a focus on digital electronics.

Contact

LinkedIn

Skills

Core Skills

Verification Engineering

Other Skills

Cache CoherencyMatlabDigital ElectronicsDigital Signal ProcessingVerilogVery-Large-Scale Integration (VLSI)CC++LinuxCadence VirtuosoUniversal Verification Methodology (UVM)

About

Experienced Design Manager skilled in Matlab, Digital Electronics, Digital Signal Processing, Verilog, and Very-Large-Scale Integration (VLSI). Strong arts and design professional with a Master of Technology (M.Tech.) focused in vlsi design & system from Graphic Era University, Dehradun.

Experience

8 yrs 8 mos
Total Experience
1 yr 8 mos
Average Tenure
2 yrs 1 mo
Current Experience

Intel corporation

IP Design Verification Engineer

May 2024 – Present · 2 yrs 1 mo

Cache CoherencyVerification Engineering

Mentor graphics

2 roles

Lead Member of Technical Staff

Promoted

Oct 2023 – May 2024 · 7 mos · Noida, Uttar Pradesh, India

Senior Member of Technical Staff

Sep 2021 – Sep 2023 · 2 yrs · Noida, Uttar Pradesh, India

Truechip solutions

Verification Engineer

May 2019 – Sep 2021 · 2 yrs 4 mos · Noida, Uttar Pradesh, India

Vlsi

CDAC

Aug 2018 – Apr 2019 · 8 mos · Noida Area, India

Drs-energy-pvt-ltd

Sales Manager

Jul 2017 – Jul 2018 · 1 yr

Education

Centre for Development of Advanced Computing (C-DAC)

PG-DVLSI — VLSI

Jan 2018 – Jan 2019

Graphic Era Deemed to be University

Master of Technology (M.Tech.) — VLSI Design & System

Jan 2014 – Jan 2016

Uttrakhand Technical University, Dehradun

Bachelor's of technology

Jan 2009 – Jan 2013

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