Arnab Saha — Software Engineer
Deeply motivated to lead, own and contribute in the analog and mixed-signal circuits domain; leveraging a strong foundation in circuit design, physical design, layout, RTL and AMS verification to enable impactful engineering solutions. Proven track record of over 8+ years, mentoring several cross-functional VLSI teams, partner fabs and IP Vendors, delivering 10+ successful tape-outs (high-speed SerDes, memory, chiplet interconnects, precision analog) in advanced CMOS technology nodes (90nm to 12nm, sub 10nm), driving first pass silicon success and mass production for networking, data-center, wireless and mobile SOCs. Experienced in driving technical program leadership, infrastructure scalability, system integration, reliability engineering, operational readiness, and metrics-driven execution across complex multi-stakeholder environments operating under aggressive schedules and evolving platform requirements. Skillset: ◦ Programming languages: C, C++, MATLAB, Verilog, System Verilog, VHDL, Perl/Shell/TCL, Python, SKILL. ◦ VLSI CAD: HSPICE, RTL Compiler, ANSYS TOTEM (EM/IR), SI/PI, QRC, Cadence Virtuoso, Spectre/X/APS, Calibre, MATLAB, Layout Suite, Xilinx ISE, Xilinx Quartus-II, ModelSim SE/Questa, Synopsys Spyglass, USB 2.0 Analyzer, Lint, CDC, SDC, UPF. ◦ Bus interfaces: PCI, PCIe, AXI/AHB/APB, I2C, ATB, Ethernet, CXL, USB, CAN, LIN. IPs expertise: LDOs, Bandgap references, IREF/VREF, POR, ADC/DACs, PLLs, CDR, Oscillators, General Purpose IOs, Tempsense, SerDes/PHYs, Die to Die interconnect, High-speed IO, Optical TIA, Sensor AFE, VCO/DCO, PFD/TDC, HS-DIV, RX (Equalizer, VGA, Sampler, PI, Deserializer), buck, boost, multiphase DC/DC converters
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in analog and mixed-signal circuits.
Experience: 6 yrs 3 mos
Skills
- High-speed Serdes
- Analog Integrated Circuit Design
- Mixed-signal Ic Design
Career Highlights
- Over 8 years of experience in VLSI design.
- Led 10+ successful tape-outs in advanced CMOS technology.
- Expert in high-speed SerDes and mixed-signal circuits.
Work Experience
Cadence
Senior Lead Engineer (11 mos)
MediaTek
Senior Engineer II (3 yrs 3 mos)
Ceremorphic, Inc.
AMS Design Intern (5 mos)
Microsoft
Silicon Design Intern - High-Speed PHY/IO Team (3 mos)
Texas Instruments
Analog IC Systems/ Design & DV Engineer (2 yrs 1 mo)
Analog Design/Validation Intern (4 mos)
Intel Labs
Embedded Software Intern (3 mos)
Education
Master of Science - MS at University of Michigan
Bachelor of Technology - BTech at National Institute of Technology Tiruchirappalli (NIT Trichy)