Saikiran Lakkakula

DevOps Engineer

Hyderabad, Telangana, India7 yrs 11 mos experience

Highly Stable

Key Highlights

Expert in Physical Design and ASIC methodologies.
Proficient in Cadence tools for VLSI design.
Strong background in Unix and scripting languages.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in ASIC development and Physical Design.

Contact

Skills

Core Skills

Physical DesignApplication-specific Integrated Circuits (asic)

Other Skills

Cadence EncounterCadence rtl compilerCadence VirtuosoCadence etsTCLUnixVHDLXilinx ISECWindowsMicrosoft OfficeVerilogCMOSVery-Large-Scale Integration (VLSI)Perl

Experience

7 yrs 11 mos

Total Experience

3 yrs 4 mos

Average Tenure

1 yr 2 mos

Current Experience

Amd

Member of Technical Staff

Apr 2025 – Present · 1 yr 2 mos · Hyderabad, Telangana, India · On-site

Cadence EncounterCadence rtl compilerCadence VirtuosoCadence etsPhysical DesignTCL+16

Aion silicon

3 roles

Staff Physical Design Engineer

Promoted

Oct 2022 – Apr 2025 · 2 yrs 6 mos · Hyderabad, Telangana, India

Sr. Physical Design Engineer

Mar 2021 – Nov 2022 · 1 yr 8 mos · Hyderabad, Telangana, India

Physical Design Engineer

Jul 2019 – Mar 2021 · 1 yr 8 mos · Hyderabad, Telangana, India

Altran

Physical Design Engineer

Jul 2018 – Jul 2019 · 1 yr · Coimbatore, Tamil Nadu, India

Institute of silicon systems pvt. ltd.

Physical Design Engineer

Dec 2017 – Apr 2018 · 4 mos · Hyderabad, Telangana, India

Education

Jawaharlal Nehru Technological University

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2013 – Jan 2017

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