SUPRATIM DAS

Software Engineer

Bengaluru, Karnataka, India13 yrs 7 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in ASIC design for next-gen GPUs.
Strong background in RTL design and verification.
Passionate about electronics and DIY projects.

Stackforce AI infers this person is a semiconductor design engineer with expertise in ASIC and memory subsystem architecture.

Contact

Skills

Core Skills

Asic DesignMemory SubsystemRtl DesignVerificationTeachingElectronics

Other Skills

ASP.NETAlgorithmsApplication-Specific Integrated Circuits (ASIC)BashBullet PhysicsCC (Programming Language)C#C++Cadence VirtuosoComputer ArchitectureComputer ScienceContikiCore JavaData Structures

About

I always loved tinkering since I was a Kid. How things worked always piqued my interest and my childhood is full of successful attempts at taking things apart and then failed attempts at putting them back together :). I was most fascinated with computers and electronics, which eventually led me to pursue engineering in the field of electronics and computer science. Currently I work in NVIDIA's memory subsystem ASIC team, helping design/co-architect memory subsystems for next gen GPUs/SOCs within well defined PPA budget. Prior to NVIDIA, I have worked at Samsung/STMicroelectronics on RTL design and embedded software development. At heart, I am still a kid who loves to tinker, and fascinated by how things work. For fun I engage in occasional DIY. To sum up, I do what I love, and I love what I do! :)

Experience

13 yrs 7 mos

Total Experience

3 yrs 4 mos

Average Tenure

9 yrs 11 mos

Current Experience

Nvidia

2 roles

Senior ASIC Engineer

Promoted

Oct 2017 – Present · 8 yrs 8 mos

GPU Memory Subsystem

ASIC DesignMemory Subsystem

ASIC Engineer

Jul 2016 – Oct 2017 · 1 yr 3 mos

GPU Memory Subsystem

ASIC DesignMemory Subsystem

Samsung research institute - delhi

Hardware Engineer

Sep 2014 – Jul 2016 · 1 yr 10 mos · Noida Area, India

Worked with the Visual Display SoC design team of the SOC group in Samsung R&D Institute - Delhi. Activities in which I am usually involved with are:
High level modeling of IPs from their algorithmic description in C/C++
Performance verification of the high level models
RTL design and verification of IP from their high level models
Performing Lint checks/Synthesis and timing closure of the RTL

RTL DesignVerification

Jaypee institute of information technology

Assistant Professor

Jul 2014 – Sep 2014 · 2 mos · Noida Area, India

As a faculty of electronics and communications engineering I taught electrical circuit analysis to undergraduate students.

TeachingElectronics

Stmicroelectronics

Intern

Jul 2013 – Jun 2014 · 11 mos · Greater Noida

I have worked with the Advanced Systems Technology group, in a wide variety of technologies and was involved in various research based activities in areas like computer graphics and physics simulation, wireless sensor network security and image processing.