Yuktha C — Product Engineer
Currently working in Qualcomm as Formal verification engineer technology: Soc connectivity, low power verification,sequential equivalence checking,formal property verification,coverage. Expertise in Cadence Jasper Apps protocols: CHI, AXI, AHB, CXL.mem
Stackforce AI infers this person is a Formal Verification Engineer with expertise in ASIC design and verification methodologies.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 5 mos
Skills
- Formal Verification
- Systemverilog
- Asic Design
Career Highlights
- Expert in formal verification methodologies.
- Proficient in Cadence Jasper Apps.
- Strong background in low power verification techniques.
Work Experience
Qualcomm
Senior Lead Formal Verification Engineer (6 mos)
Senior Formal Verification Engineer (1 yr 10 mos)
Cadence Design Systems
Sr Application Engineer (8 mos)
Application Engineer (1 yr 5 mos)
AE intern (4 mos)
UG-intern (5 mos)
Education
Master of Technology - MTech at BITS Pilani Work Integrated Learning Programmes
Bachelor of Technology - BTech at B. M. S. College of Engineering
PUC at Vikas Pre-University College - Mangalore