Akshay Jain

Software Engineer

India6 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expertise in VLSI and ASIC design.
Proven track record in timing closure and signoff checks.
Experience with advanced 16nm FinFET technology.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and ASIC technologies.

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Skills

Core Skills

Integrated Circuit DesignVlsiAsic

Other Skills

16nm finfet designApplication-Specific Integrated Circuits (ASIC)CC++CTSDRCDigital ElectronicsEMJavaLVSMatlabMicrosoft ExcelMicrosoft OfficePerlPhysical Design

Experience

Qualcomm

2 roles

Senior Staff Engineer

Promoted

Nov 2025 – Present · 4 mos · On-site

Staff Engineer

Nov 2022 – Nov 2025 · 3 yrs · On-site

Broadcom

Engineer , Staff -I IC Design

Oct 2015 – Dec 2016 · 1 yr 2 mos · Bangalore

Avago technologies

IC Design Engineer-I

Jul 2014 – Oct 2015 · 1 yr 3 mos · Bengaluru Area, India

Working on 16nm finfet design of a RTL handoff project. Handling four HHMs including complete timing closure including placement, CTS, routing and STA. Performed Signoff checks including DRC, LVS, EM, Power, and noise.

16nm finfet designRTL handofftiming closureplacementCTSrouting+8

Lsi india

ASIC DvDs Enginneer

Jul 2013 – Jul 2014 · 1 yr · Bangalore

Responsibilities include block level timing closure on two HHMs in 16nm finfet design. Contributed in setting up signal EM flow and power optimization flow.

block level timing closure16nm finfet designsignal EM flowpower optimization flowASICIntegrated Circuit Design