Aayushya Srivastva — Software Engineer

Worked on Covercell on TSMC 16nm Worked on 𝗛𝗜𝗚𝗛-𝗦𝗣𝗘𝗘𝗗 𝗦𝗘𝗥𝗗𝗘𝗦 𝗣𝗥𝗢𝗝𝗘𝗖𝗧 on 𝗧𝗦𝗠𝗖 𝟭𝟲𝗻𝗺 Blocks: : >> LDO >> Opamps >> Oscillators >> PFD(Phase Frequency Detector) >> Comparator >> Charge-pump >> Divider >> Decoder >> Level-Shifter and some standard cells(TSMC 16nm) 𝗧𝗼𝗼𝗹𝘀 𝗞𝗻𝗼𝘄𝗹𝗲𝗱𝗴𝗲 >> Virtuoso Physical Design Products(Layout Suite L, XL AND GXL and Schematics Editor) >> MODGEN >> SKILL-IDE >> Virtuoso Space-Based Router >> Cadence PVS AND PEGASUS – DRC, LVS, XOR, SVS, ERC, PERC >> Calibre >> DRD, WSP & MPT 𝗨𝗡𝗜𝗫 𝗮𝗻𝗱 𝗦𝗰𝗿𝗶𝗽𝘁𝗶𝗻𝗴 𝗟𝗮𝗻𝗴𝘂𝗮𝗴𝗲𝘀: >> BASH >> TCL >> PERL(3 stars on Hacker Rank) >> SKILL (Cadence Certificate) 𝗩𝗟𝗦𝗜 𝗞𝗻𝗼𝘄𝗹𝗲𝗱𝗴𝗲: >> RC Concepts >> CMOS Fabrication Techniques >> Crosstalk & Shielding >> Floorplan & Placememt >> Matching >> Double Patterning >> Latchup & ESD >> EM and IR drop >> Antenna Effect >> LVS, DRC, Dummy and Metal Fill >> Parasitics Extraction

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Layout and EDA tools.

Location: Hyderabad, Telangana, India

Experience: 8 yrs 5 mos