Maski Shravan Kumar Mallikarjuna

Product Manager

Karnataka, India14 yrs experience
Highly Stable

Key Highlights

  • Expert in FPGA prototyping and verification methodologies.
  • Strong background in digital circuit design education.
  • Proficient in SystemVerilog and assertion-based verification.
Stackforce AI infers this person is a VLSI and FPGA verification specialist with a focus on education and application engineering.

Contact

LinkedIn

Skills

Core Skills

FpgaVerilogFpga PrototypingAssertion Based Verification Using SystemverilogFunctional CoverageVhdlC++

Other Skills

8086ASICC (Programming Language)Code CoverageCodingDigital DesignEDAField-Programmable Gate Arrays (FPGA)Functional VerificationGate Level SimulationHDL DesignerHigher Education TeachingIndustry TrainingIntegrated Circuit DesignLogic Design

About

IP Verification and System Validation

Experience

Ballari institute of technology and management

Assistant Professor

Oct 2022 – Mar 2023 · 5 mos · Ballari, Karnataka, India · On-site

  • Contributed in building Curriculum and Delivering of Digital Circuit Design Using Verilog
FPGAVerilogLogic DesignHigher Education TeachingDigital Design

Career break

Health and well-being

Jun 2019 – Sep 2022 · 3 yrs 3 mos · Ballari, Karnataka, India

Synopsys inc

Senior Application Engineer

Apr 2018 – May 2019 · 1 yr 1 mo · Hyderabad Area, India · On-site

  • Worked on post runtime feature validation of ZeBu Platform
FPGA prototypingVerilogVHDLC (Programming Language)Zebu

Celerix technologies

Verification Engineer

Apr 2014 – Mar 2018 · 3 yrs 11 mos · Bengaluru Area, India

  • Celerix builds hardware accelerated solutions that achieve high throughput with minimal power and nanosecond latency by accelerating key application-specific workloads, we focus on system performance by implementing complex algorithms in FPGA. Our SoC Systems provide built in IP cores and full turn-key solutions that map business logic into FPGA products for Accelerated finance and High Frequency Trading (HFT), with complete system on hardware. By fitting complex designs on the chip that meet timing, our IP cores and solutions are able to achieve performance levels that are unattainable in software.
SVAssertion Based Verification using SystemverilogFunctional CoverageHDL DesignerQuestaSystem Requirements+1

Coreel technologies

Member Technical Staff

Oct 2010 – Mar 2014 · 3 yrs 5 mos · Bengaluru, Karnataka, India · On-site

Assertion Based Verification using SystemverilogFunctional CoverageCode CoverageIndustry TrainingQuestaSimSystemVerilog

Vijayanagar engineering college, bellary

Lecturer

Aug 2005 – Jul 2007 · 1 yr 11 mos · Ballari, Karnataka, India · On-site

  • Theory Handled - Basic Electronics, Microprocessor 8086, Electronic Circuits, Programming with C++
  • Labs Handled - VLSI Lab, Microprocessor 8086 Lab, VHDL Lab, Programming with C++ Lab
VHDLC++8086VLSI CAD

Education

National Institute of Technology, Tiruchirappalli

Master of Technology (M.Tech.) — VLSI Systems

Jan 2007 – Jan 2009

Visvesvaraya Technological University

Bachelor of Engineering (B.E.)

Jan 2001 – Jan 2005

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