Hrishikesh C.

CEO

Raleigh, North Carolina, United States7 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Verification and Validation methodologies.
Proficient in UVM and SystemVerilog for design verification.
Strong background in automotive chip functionality verification.

Stackforce AI infers this person is a Verification Engineer specializing in automotive and semiconductor industries.

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Skills

Core Skills

Verification And Validation (v&v)Functional VerificationDesign Verification Testing

Other Skills

Automotive Chip FunctionalityCC++CAN ProtocolCadence VirtuosoComputer ArchitectureDVDesign VerificationDigital Verification TestingEDAEmbedded SystemsEmulationFirmwareFormal VerificationFreeRTOS

About

Currently working as Coherency Verification Engineer at Microsoft. Skills and Key Competencies: • HDL/HVL: SystemVerilog, Verilog, UVM and Verification Environment. • Programming Languages: C, C++, Python, FreeRTOS. • Emulator/FPGA: Mentor Graphics Veloce solo. Nexys4 DDR Artix-7 FPGA. • Standards: I2C, SPI, CAN Protocol. Familiar with MIPS ISA. • CAD Tools: QuestaSim, Synopsis DC Compiler, Xilinx Vivado, Visual Studio Code, Cadence Virtuoso. • Operating Systems: Linux, Windows.

Experience

Microsoft

Coherency Verification Engineer

Jan 2022 – Present · 4 yrs 2 mos · Raleigh-Durham-Chapel Hill Area

SystemVerilogUVMVerification EnvironmentVerification and Validation (V&V)Functional Verification

Amd

Design Engineer

Aug 2019 – Jan 2022 · 2 yrs 5 mos · Greater Boston

Panasonic usa

Digital Design Intern

Sep 2018 – May 2019 · 8 mos · Greater Boston

Working in Design Verification Team.
Verifying functionality of serial interface in an automotive chip.
Developing UVM verification components (Interface, Agent, Driver, Sequence, Scoreboard, Monitor).
Driving Functional and Code coverage to help increase in design quality.

UVMDesign VerificationAutomotive Chip FunctionalityDesign Verification TestingFunctional Verification