Hiral F. — Software Engineer
Experienced Verification Engineer with a demonstrated history of working in the VLSI technology and services industry. Skilled in System Verilog , Universal Verification Methodology (UVM), Verilog and Perl scripting. Strong quality assurance professional with a BE - Bachelor of Engineering focused in Electronics and Communications Engineering.
Stackforce AI infers this person is a VLSI Verification Engineer with expertise in electronic design automation.
Experience: 7 yrs 6 mos
Skills
- System Verilog
- Universal Verification Methodology (uvm)
Career Highlights
- Proficient in System Verilog and UVM for VLSI verification.
- Strong background in electronics and communications engineering.
- Experience in both design verification and functional verification roles.
Work Experience
Arrow Electronics
Design Verification Engineer(Level 2) (3 yrs 11 mos)
eInfochips (An Arrow Company)
Design Verification Engineer (2 yrs 9 mos)
Verification Trainee Engineer (5 mos)
eiTRA - eInfochips Training & Research Academy Ltd
Trainee (5 mos)
Education
BE - Bachelor of Engineering at Government Engineering College (GEC) Bhavnagar
Science at Shree Swaminarayan Gurukul High School
