Ritesh Belgudri

CEO

Dharwad, Karnataka, India11 yrs 4 mos experience

Key Highlights

Expert in FPGA architecture and design.
Led development of industry-first CXL Type 2 solution.
Technical lead on government-funded semiconductor projects.

Stackforce AI infers this person is a Semiconductor and Data Center specialist with extensive FPGA expertise.

Contact

Skills

Core Skills

FpgaCadSoc DesignData Center AccelerationCxlNetworkingRtl Design

Other Skills

ASICApplication-Specific Integrated Circuits (ASIC)CC (Programming Language)C++CXL(Compute Express Link)Cadence VirtuosoCircuit DesignComputer-Aided Design (CAD)ElectronicsEmbedded CField-Programmable Gate Arrays (FPGA)Integrated Circuit DesignJavaMatlab

About

Exploring Reconfigurable Logic and Wires. Building Silicon : one transistor at a time.

Experience

Entra innovations

Co-Founder and CEO

Sep 2025 – Present · 6 mos · Dharwad, Karnataka, India · On-site

Indian institute of technology dharwad

PHD Scholar

Jan 2025 – Present · 1 yr 2 mos · Dharwad, Karnataka, India · On-site

Working on Verilog-To-Routing, OpenFPGA flow, Open FPGA Stack (OFS). Open-Source EDA, RISC-V CPU Integration.
Technical Lead for MEITY, Govt of India funded C2S (Chip to Startup) project- TPMS (Tire Pressure Monitoring System) SoC, Principal Investigator : Prof. Nagaveni S

Field-Programmable Gate Arrays (FPGA)Computer-Aided Design (CAD)Circuit DesignFPGACAD

Altera

FPGA Design Applications Engineer, Acceleration Systems

Jun 2022 – Nov 2024 · 2 yrs 5 mos · Bengaluru, Karnataka, India · Hybrid

Contributor to Open FPGA Stack (OFS) https://github.com/OFS
Technical lead in Factory Apps for CXL Type 2 based Acceleration Development Platform. Enabling Industry's first CXL Type 2 solution.
Customer centric to drive quality deliverables of FPGA based acceleration (Platform) solutions.

Data Center AccelerationCXL(Compute Express Link)Open FPGA stackField-Programmable Gate Arrays (FPGA)CXL

Edgeq inc.

Member Of Technical Staff

Sep 2021 – May 2022 · 8 mos · Bengaluru, Karnataka, India

Emulation & FPGA Prototyping for 5G SoC
Soc Simulation for Interface bring-up
Developed script (on runtime environment) for flow automation
Bring up and Debug SoC Boot Sequence, Linux on Emulator
Enabling Dynamic Power Analysis using Emulation Flow

Intel corporation

Field Applications Engineer

Nov 2018 – Sep 2021 · 2 yrs 10 mos · Bengaluru, Karnataka, India

Customer obsessed technical support. FPGA device, Quartus, accelerator card support.

Axlware technologies (indian subsidary of futura it solutions, uk)

FPGA Architect

Feb 2018 – Nov 2018 · 9 mos · Bengaluru, Karnataka, India

Architect and Designed Low Latency UDP/IP offload Engine (UOE) core for 10G line rates
Architected TCP/IP offload engine (TOE)
Designed and Validated Market Data Feed Handler IP core in FPGA
Optimized Intel PCIe DMA engine for low latency operation
PCIe device driver development - owned FPGA side DMA programming & ring buffer management
Owned system validation at BSE co-location for 10G throughput. Achieved target throughput.

Unizen technologies

FPGA Design Engineer

Jul 2014 – Jan 2018 · 3 yrs 6 mos · Bangalore, India

Architecture and RTL Design for High Performance Computing using Intel Stratix V FPGA.
High Level Architecture and RTL Design for handheld printer using small form factor Intel/Altera MAX 10 FPGA, Xilinx Spartan 6 FPGA.
VHDL and Verilog coding.
Hardware Debugging.
TCL, Python, shell scripting for tool automation.
Interacted with cross functional teams (software, mechanical, systems) for collaboration
Interacted with customer to understand requirement.