Megha Goswami

Software Engineer

Bengaluru, Karnataka, India15 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expertise in DFT methodologies and architectures.
Proven track record in optimizing design flows.
Strong background in VLSI and ASIC design.

Stackforce AI infers this person is a DFT and VLSI specialist in the semiconductor industry.

Contact

Skills

Core Skills

DftVlsiScan DesignMemory BistVerification

Other Skills

ARMASICATE SimulationsATPG verificationApplication-Specific Integrated Circuits (ASIC)CCADCAD checksCadence VirtuosoDFT ArchitecturesDFT design methodologiesDebuggingEDAEmbedded SystemsFPGA

Experience

Nvidia

4 roles

Senior DFT Engineer III

Promoted

Apr 2024 – Present · 1 yr 11 mos

Gate level Scan insertion activities for data center chips and driving Methodology tasks to optimize flow execution efforts and deliver quality results for down-stream teams, and supporting internal cad based checks development and validation, working with CAD, Meth and VLSI teams.

DFTScan insertionMethodology tasksCAD checksVLSI

Senior DFT Engineer II

Apr 2019 – Apr 2024 · 5 yrs

Leading activities which covers Scan Design of testability methodologies , DFT Architectures, Scan insertion, Defining specs and Working on feature implementations with CAD and using them on projects.

Scan DesignDFT ArchitecturesFeature implementationsCADDFT

Sr DFT Engineer l

Promoted

Oct 2015 – Mar 2019 · 3 yrs 5 mos

Lead roles covering Memory BIST architectures , DFT design controllability and observability methodologies including clocks, worked an Application Engineer to develop methods and checks for design PoR including power methodologies for scan architectures.

Memory BIST architecturesDFT design methodologiesPower methodologiesDFTMemory BIST

DFT Engineer II

Jan 2012 – Oct 2015 · 3 yrs 9 mos

ATE Simulations verifications , Defined Jtag checks for Thermal sensors and In Silicon measurement methodologies. noise measurements , voltage sensors, ATPG verification on scan design to dump the functional data

ATE SimulationsJTAG checksATPG verificationDFTVerification