Abhishek Potdar

Software Engineer

Bengaluru, Karnataka, India10 yrs 6 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Formal Verification methodologies.
Strong programming skills in C++ and System Verilog.
Proven experience in leading verification projects.

Stackforce AI infers this person is a Formal Verification Engineer with expertise in semiconductor and electronic design automation.

Contact

Skills

Core Skills

Formal VerificationUniversal Verification Methodology (uvm)

Other Skills

CC++Customer ServiceEnglishLeadershipMatlabMicrosoft OfficePowerPointProgrammingPublic SpeakingResearchSocial MediaStrategic PlanningSystem VerilogTeaching

Experience

Intel corporation

Formal Verification Engineer

Nov 2021 – Present · 4 yrs 4 mos · Bengaluru, Karnataka, India

Universal Verification Methodology (UVM)Formal VerificationC++System Verilog

Oski technology

Formal Verification Engineer

Feb 2017 – Nov 2021 · 4 yrs 9 mos · Gurugram, Haryana, India

Universal Verification Methodology (UVM)Formal VerificationC++System Verilog

Lexinnova

Technology Analyst

Aug 2015 – Dec 2016 · 1 yr 4 mos · Gurugram, Haryana, India

Texas instruments

Intern

May 2014 – Jul 2014 · 2 mos · Bangalore, India

Education

Indian Institute of Technology, Delhi

Bachelor of Technology (B.Tech.)

Jan 2011 – Jan 2015

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