Gaurav Kasana

Software Engineer

Ghaziabad, Uttar Pradesh, India3 yrs 8 mos experience

Key Highlights

Senior RTL Design Engineer with Qualcomm
Expertise in Digital Hardware Design and Verification
Strong foundation in VLSI from top universities

Stackforce AI infers this person is a VLSI Design Engineer with a focus on digital hardware and verification methodologies.

Contact

Skills

Core Skills

Digital Hardware DesignSystemverilog

Other Skills

LINTCDCUSB4SVAUniversal Verification Methodology (UVM)DCIDFormal VerificationVerilogC (Programming Language)LTSpiceOrCAD

Experience

3 yrs 8 mos

Total Experience

2 yrs 11 mos

Average Tenure

9 mos

Current Experience

Qualcomm

Senior RTL Design Engineer

Jul 2025 – Present · 9 mos · Noida · On-site

LINTCDCUSB4SVAUniversal Verification Methodology (UVM)DCID+7

Intel corporation

2 roles

IP Logic Design Engineer

Jun 2023 – Jul 2025 · 2 yrs 1 mo · Bengaluru, Karnataka, India

Pre Silicon Verification/Validation Intern

Aug 2022 – Jun 2023 · 10 mos · Bengaluru, Karnataka, India

Education

Delhi Technological University (Formerly DCE)

Master of Technology - MTech — VLSI

Jan 2021 – Jan 2023

KIET Group of Institutions

Bachelor of Technology - BTech — ECE

Aug 2016 – Sep 2020

Delhi Public School Ghaziabad

Intermediate — Science(PCM)

Jul 2014 – May 2015

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