Chellaram Polamarasetty

Software Engineer

United States7 yrs 6 mos experience

Highly Stable

Key Highlights

Expert in DFT techniques for complex SOCs.
Strong background in RTL coding and ASIC design.
Proven track record in improving testability.

Stackforce AI infers this person is a Semiconductor Engineering Specialist with expertise in ASIC and VLSI design.

Contact

Skills

Core Skills

DftAsic

Other Skills

Analog TestingApplication-Specific Integrated Circuits (ASIC)Boundary ScanCadenceDFT techniquesDebuggingICIntegrated Circuit DesignIntegrated Circuits (IC)Logic BISTMemory BISTModelSimNCSimOn-Chip CompressionPrimetime

About

Experienced Senior Engineer with a demonstrated history of working in the semiconductors industry. Skilled in RTL Coding, Physical Design, SystemVerilog, Application-Specific Integrated Circuits (ASIC), and Semiconductors. Strong engineering professional with a DIPLOMA COURSE focused in VLSI from R V college.

Experience

Altran

Senior Engineer

May 2012 – Nov 2019 · 7 yrs 6 mos · Bangalore Urban, Karnataka, India

Key Responsibilities :
Will be responsible for Designing and Implementing DFT techniques (Memory BIST / Scan / On-Chip Compression / Atspeed Scan / Test-
clocking / Boundary Scan / Analog Testing / Pin-muxing / Logic BIST) on complex SOCs to improve testability
Test Modes implementation and verification, scan insertion including on-chip compression
Implementing, integrating and verifying memory BIST and boundary scan
Test vector (Stuck-at / At-speed / IDDQ /) generation with high test coverage.

DFT techniquesMemory BISTScanOn-Chip CompressionTest-clockingBoundary Scan+4