Abijith Prakash — Software Engineer
Work Experience: SV/UVM testbench development and coverage for Compute Unit block, AMBA4 AXI4-APB4. SNPS amba compliance testing with full suite functional coverage from snps and tested until 100% coverage met. AI Compute Unit DMA verification with testbench and sequencing from scratch with sv and uvm. Micro Architecture to Specification to UVM sequence conversion done for DMA Controller Initiator mode, testplan creation and regress testing the initiator mode. Cache Coherency Have used AMBA CHI integration with CXS integration for a Chip-2-Chip DUT with snps and presented. Successfully Integrated hw-sw python flows and ci cd flows for a start up firm, Krutrim. Worked on Audio-Video Meta/Mediatek ARM based SoCs with emphasis on Audio SS and I2S Integration. Also worked on SoC boot flow with Security sub systems and demonstrated tarmac utilities with hw-sw co simulation. Integrated python flows to support perforce and design and testbench labelling. PCIE based SoC independent phy layer verification with DFX features for Intel with Intel pipe and phy based devices. Handling SVA and GLS verification bringup and simulations with sdf min/max for the same PCIE phy. SNPS ZOIX fault simulation with netlist nlp simulations and checking fault coverage. SoC Verification for Renesas synergy mcu and toggle coverage closures. rtl top creation with in-house Renesas tools for integration. Experience with Synopsys EDA tools. Experience with building successful verification setup involving yaml, json and python with help of open source codes. Experiences with integrating and maintaining CICD for verification teams. Undergone certified training in UVM and SV from Maven Silicon, Bangalore. Mentoring junior engineers on SV, UVM and Python. Semiconductor Device Modelling: Working Experience in Semiconductor Manufacturing Technology with wafer characterization for TSMC and Nuvoton. Education: • MS in Semiconductor Manufacturing Tech. • BE Electronic and Telecommunications
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SoC and EDA tools.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 10 mos
Skills
- Amba
- Python
- Arm Architecture
- System On A Chip (soc)
- Pcie
- Sva
- Semiconductor Device
Career Highlights
- Expert in SoC verification and compliance testing.
- Proficient in UVM and System Verilog methodologies.
- Strong background in semiconductor manufacturing technology.
Work Experience
Krutrim
IP Verification Engineer (1 yr 8 mos)
MediaTek
SoC Verification Engineer (1 yr 6 mos)
Intel Corporation
IP Verification Engineer (3 yrs 11 mos)
Wipro
SoC Verification Engineer (1 yr 4 mos)
Chip Integration Technology Corporation
R&D Engineer (1 yr 5 mos)
Tsmc
Intern (2 mos)
Education
Master's degree at Asia University (TW)
B.E at BMS Institue of Technology
