Sankalp Malpani

Product Manager

Mumbai, Maharashtra, India6 yrs 10 mos experience

Highly Stable

Key Highlights

7+ years of experience in RTL design.
Expertise in FPGA and ASIC RTL development.
Proven track record in low latency solutions.

Stackforce AI infers this person is a VLSI and FPGA design expert with extensive experience in financial technology.

Contact

Skills

Other Skills

Field-Programmable Gate Arrays (FPGA)Linux ScriptingMicrosoft OfficePerlSVUniversal Verification Methodology (UVM)VHDLVerilogVery-Large-Scale Integration (VLSI)

About

7+ Year of experience in RTL Design. Worked on FPGA and ASIC RTL development.

Experience

Optiver

FPGA Engineer

Jul 2025 – Present · 8 mos · Mumbai, Maharashtra, India · On-site

Goldman sachs

Vice President

Jun 2024 – Jun 2025 · 1 yr · Bengaluru, Karnataka, India · On-site

Part of GSET FPGA Global Team, working on delivering Ultra Low Latency Solution Platform (using FPGA) across JPX, ASX Australia, CBOEAU, EMEA Markets.
Managing and updating the pre-existing FPGA Systems with respect to risk checks and exchange specific architectural/protocol updates for clients.

Iragecapital advisory private limited

2 roles

FPGA Specialist

Promoted

Jun 2023 – May 2024 · 11 mos · Bengaluru, Karnataka, India · Hybrid

Developed and Deployed multiple in-house strategies for NSE, BSE and MCX.
Verification of strategies on Test Environment.
Support during prod hours.

Core Developer (FPGA)

Feb 2019 – Jun 2022 · 3 yrs 4 mos · Mumbai

Design Architecture, RTL Design, Hardware Validation and Integrating Design with PROD
Systems.
Worked on Ethernet Protocol and PCIe Protocol.
Developed Hybrid TCP/IP Stack on FPGA.
Support during Trading/Market Hours on day-to-day basis to give minimum system downtime.

Samsung r&d institute india

Lead Engineer

Jun 2022 – May 2023 · 11 mos · Delhi, India · On-site

To co-work with RTL Team in developing modules and with Verification team in testing integrated code for Visual Display SOCs.
Reviewing Synthesis and LINT Reports and doing necessary changes for having clean design.
Worked upon AIBD (AI-Ball Detection) Project, which enhances pixel quality of ball and it's nearby region by passing frame through multiple layers of algorithms.
Worked upon QSR-Plus Project, which enhances overall quality of frame by passing frame through different algorithm layers.