Muhammedshabin S

Software Engineer

Bengaluru, Karnataka, India4 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in formal and assertion-based verification.
  • Proven experience in core level and cache coherency verification.
  • Strong foundation in VLSI design and embedded systems.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in formal verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Formal VerificationUniversal Verification Methodology (uvm)Cache Coherency

Other Skills

Assertion Based VerificationMipsField-Programmable Gate Arrays (FPGA)SystemVerilogAMBAPerl

Experience

4 yrs 8 mos
Total Experience
4 yrs 8 mos
Average Tenure
4 yrs 8 mos
Current Experience

Mediatek

3 roles

Staff Engineer, Design Verification

Jun 2024 – Present · 1 yr 10 mos

Formal VerificationAssertion Based VerificationMipsCache CoherencyField-Programmable Gate Arrays (FPGA)Universal Verification Methodology (UVM)+3

Senior Design Verification Engineer

Jul 2021 – May 2024 · 2 yrs 10 mos

  • Design Verification
  • Currently working on core level verification. Added assertion models for feature specific verification.
  • Worked on formal verification of different sub blocks of Core and Cache coherency Manager.
  • Writing complex assumptions and assertions for formal verification. Developed strategy to verify constraint level of assumptions through functional verification.
  • Worked on functional verification of cache coherency manager.
  • Worked on AMBA protocol based IP verification
Universal Verification Methodology (UVM)PerlFormal Verification

Design Verification Intern

Aug 2020 – Jun 2021 · 10 mos

Education

National Institute of Technology Rourkela

Master of Technology - MTech — VLSI design & embedded system

Jan 2019 – Jan 2021

Sree Chitra Thirunal College of Engineering, Pappanamcode, Thiruvananthapuram

Bachelor of Technology - BTech — E Electronics and Communications Engineering

Jan 2013 – Jan 2017

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