Abhishek Agarwal — Software Engineer
I am an Analog/Mixed-Signal IC Design Engineer with hands-on experience in designing analog and RF blocks for cutting-edge SerDes applications in advanced process nodes (down to 4nm), involving design for 200G PAM4 DSP chips—specifically in DCCs (duty-cycle correction) and high-resolution calibration blocks I hold a Master’s degree in Electrical Engineering from UC San Diego and a B.Tech. from IIT Kanpur, graduating among the top 5 in my department. I am proficient in Cadence design tools, EM extraction, Calibre LVS/QRC tools, and have worked closely with layout teams for iterative improvement of the design. My academic journey and professional experience have equipped me to solve deep analog/RF challenges with a systems perspective, and I’m always eager to tackle ambitious, bleeding-edge projects.
Stackforce AI infers this person is a highly skilled Analog/Mixed-Signal IC Design Engineer specializing in advanced semiconductor technologies.
Location: San Diego, California, United States
Experience: 6 yrs 4 mos
Skills
- Analog Ic Design
- Rf Design
Career Highlights
- Expert in Analog/RF IC design for advanced technology nodes.
- Hands-on experience with 200G PAM4 DSP chip design.
- Top 5 graduate in Electrical Engineering from IIT Kanpur.
Work Experience
MaxLinear
Senior RF/MS IC Design Engineer (3 yrs 7 mos)
University of California San Diego
Graduate Student Researcher (2 yrs 9 mos)
Education
Master of Science - MS at UC San Diego
Bachelor’s Degree at Indian Institute of Technology, Kanpur
Class 1 to Class 12 at Bharatiya Vidya Bhavan Vidyashram Jaipur
Graduate Research Assistant at UC San Diego
