Pradeep manikanta Sai kurapati — Software Engineer
. I am a technology-driven, hard-working VLSI enthusiast, interested in front end VLSI design, Hardware Accelerators, SOC design. . Presently working as an RTL design engineer having experience in high-speed communication protocol like PCIe, CDC techniques, timing closure, and FPGA prototyping. . Working in the testing and measurement equipment for PCIe devices capable upto Gen6 speed such as PCIe Exerciser and PCIe Analyzer
Stackforce AI infers this person is a VLSI design engineer with expertise in hardware accelerators and high-speed communication protocols.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 8 mos
Skills
- Rtl Design
- Pcie
- Fpga
Career Highlights
- Expert in front-end VLSI design and SOC design.
- Proficient in high-speed communication protocols like PCIe.
- Experience with FPGA prototyping and testing equipment.
Work Experience
Logic Fruit Technologies
Senior Lead Engineer (1 yr 10 mos)
Module Lead (2 yrs 1 mo)
R&D Engineer Trainee (1 yr 7 mos)
ResearchWire Knowledge Solutions Pvt. Ltd.
Patent Analyst (2 mos)
SVNIT, SURAT
Training and Placement coordinator (1 yr 3 mos)
Defence Research and Development Laboratory (DRDL) - DRDO
Intern Student (1 mo)
DRISHTI-A Revolutionary Concept
Executive member (11 mos)
Education
Bachelor of Technology - BTech at National Institute of Technology Surat
