Ravi Shankar Singh — Software Engineer
Lead Design Engineer with an experience of 8.2 years. Skilled in RTL coding, logical simulation, synthesis, timing analysis, Debugging, Xilinx ISE, Vivado, VHDL, Verilog and Digital Communication.
Stackforce AI infers this person is a skilled FPGA Design Engineer with expertise in digital communication and RTL coding.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 6 mos
Career Highlights
- 8.2 years of experience in FPGA design.
- Expert in RTL coding and digital communication.
- Proficient in Xilinx tools and VHDL/Verilog.
Work Experience
HCLTech
Lead Engineer (1 yr 9 mos)
Raythink Technology Co., Ltd
Senior FPGA Design Engineer (7 mos)
Mobiveil Technologies (India)
Senior Engineer - FPGA Design (2 yrs 2 mos)
Aujus Technology Private Limited
FPGA Design Engineer (4 yrs 1 mo)
PINE TRAINING ACADEMY
FPGA trainee (10 mos)
Education
Bachelor of Technology (B.Tech.) at LORD KRISHNA COLLEGE OF ENGINEERING,GZB
