Puneet Jangid

Software Engineer

India10 yrs 8 mos experience
Highly Stable

Key Highlights

  • 7 years of experience in RTL design and verification.
  • Designed video quality improvement IPs for Samsung UHD and 8K D-TV.
  • Skilled in Hardware Architecture and RTL logic design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL design and verification.

Contact

Skills

Core Skills

Rtl DesignHardware Architecture

Other Skills

SystemVerilogOptimizationRTL DevelopmentLogic DesignIntellectual PropertyVerilogLow-power DesignC++ArchitectureDigital ArchitectureMicroarchitectureApplication-Specific Integrated Circuits (ASIC)Timing ClosureDigital DesignsProblem Solving

About

Currently working as RTL design engineer at Samsung Semiconductor India Research, Bangalore with 7 years of experience. Designed video quality improvement IP's for Samsung UHD(4K) and 8K D-TV products. Skilled in Hardware Architecture and RTL logic design, C, C++. Graduated from Indian Institute of Technology, Bombay.

Experience

Nvidia

Senior ASIC engineer

Dec 2024Present · 1 yr 3 mos · Bengaluru, Karnataka, India · On-site

Samsung semiconductor

Staff Engineer

Dec 2019Dec 2024 · 5 yrs · Greater Bengaluru Area · Hybrid

SystemVerilogOptimizationRTL DevelopmentLogic DesignHardware ArchitectureIntellectual Property+15

Samsung r&d institute india (sri-delhi)

Engineer

Jul 2017Dec 2019 · 2 yrs 5 mos · Noida, Uttar Pradesh, India

  • Responsible for design & verification of various video quality improvement IP’s for Samsung UHD(4K) and 8K D-TV Product SoC. Work involve hardware micro architecture design, rtl logic design and verification of IP.
OptimizationProblem SolvingAnalytic Problem SolvingSpyglassRTL DesignHardware Architecture

Cadence design systems

Design Intern

May 2016Jul 2016 · 2 mos · Pune, India

  • Responsible for algorithm implementation and optimization using Xtensa ISA.

Hostel 2,iit bombay

2 roles

Mess Councillor

May 2015Apr 2016 · 11 mos · Mumbai Metropolitan Region

  • Drafted new contract & implemented tendering process in supervision of Associate Dean Student Affairs
  • Led a team of 2 secretaries and 30 messing staff; responsible for messing facility of 450 fellow residents
  • Formulated weekly based mess menu structure to cover various cultural diversity in food
  • Initiatives:
  • Liaised with Dean SA & Deputy Director to sanction budget of INR 1.2lac for refrigerator in hostel mess

Maintenance Secretary

Aug 2014Apr 2015 · 8 mos · Mumbai Metropolitan Region

  • Handled the budget of INR 7.5lac for regular maintenance of hostel amenities
  • Reconstructed sheds of cycle stand and canteen pending since more than last 2 years
  • Supervised infrastructure arrangement for all hostel events
  • Initiatives:
  • Strengthened alumni relationship; received funds to install Dryers & Water coolers worth INR 1.6lac
  • Initiated the hostel painting (interior & exterior) by getting approval from estate office worth INR 12lac
  • Installed slider windows in the hostel rooms with budget of worth INR 80k tender through estate office

Techfest,iit bombay

Media and Marketing Co-ordinator

Apr 2014Feb 2015 · 10 mos · Mumbai

  • Negotiating and Collaborating with various companies to get in sponsorship for Techfest.
  • Contacted and persuaded many media personnel across the country to publish the press release In the newspaper.
  • Creating awareness about right to Information act(RTI) among the youth the nation through ASK –the awareness Campaign of Techfest, IIT Bombay.
  • Organized 8 workshops event attended by more than 3000 students during the festival

Education

Indian Institute of Technology, Bombay

Bachelor of Technology (B.Tech.) — Electrical Engineering

Jan 2013Jan 2017

Jawahar Navodaya Vidyalaya, Mahiyanwali ,Sriganganagar (Raj.)

10th standard

Jan 2006Jan 2011

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