Puneet Jangid — Software Engineer
Currently working as RTL design engineer at Samsung Semiconductor India Research, Bangalore with 7 years of experience. Designed video quality improvement IP's for Samsung UHD(4K) and 8K D-TV products. Skilled in Hardware Architecture and RTL logic design, C, C++. Graduated from Indian Institute of Technology, Bombay.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL design and verification.
Experience: 10 yrs 8 mos
Skills
- Rtl Design
- Hardware Architecture
Career Highlights
- 7 years of experience in RTL design and verification.
- Designed video quality improvement IPs for Samsung UHD and 8K D-TV.
- Skilled in Hardware Architecture and RTL logic design.
Work Experience
NVIDIA
Senior ASIC engineer (1 yr 3 mos)
Samsung Semiconductor
Staff Engineer (5 yrs)
Samsung R&D Institute India (SRI-Delhi)
Engineer (2 yrs 5 mos)
Cadence Design Systems
Design Intern (2 mos)
Hostel 2,IIT Bombay
Mess Councillor (11 mos)
Maintenance Secretary (8 mos)
Techfest,IIT Bombay
Media and Marketing Co-ordinator (10 mos)
Education
Bachelor of Technology (B.Tech.) at Indian Institute of Technology, Bombay
10th standard at Jawahar Navodaya Vidyalaya, Mahiyanwali ,Sriganganagar (Raj.)