Kumar Rohit — CEO

o Over 20 + years of experience in ASIC Design and Verification, FPGA Validation and SoC level System integration and Verification. o Worked on multiple FPGA/SoC/AISC based design/integration/verification projects. o Hands on experience in architecting and developing Sub-System/IP level micro–Architecture Specification from High level design along with Testbench/Verification/Coverage Plan o Have hands-on experience in RTL Modeling, synthesis, Timing Analysis and FPGA Based platform development o Extensive experience in development of Test Bench and infrastructure for Functional verification of complex designs using constraint-random and Coverage-driven Test benches in System Verilog/UVM/C. o Experience in Hardware/software integration and SoC Verification (ARM/SuperH). o Hands on experience in Emulation and Post Silicon Debugging o Worked in QPI, AXI/AHB,Superhyway and Avalon SOC buses o Hands on experience in various protocols like PCIe Gen4, DDR4, USB3.2, PCI, HDMI, SATA, QPI, AXI, AHB and various other Interfaces. o Worked at onsite, both onshore and offshore in various companies, with different groups, on different technologies with a very short ramp up time. o Extensive work experience in VHDL, Verilog, System Verilog, UVM, PLI, PERL, C, and Assembly level language. o Good Knowledge of Image Processing Algorithms like JPEG and JPEG2000, and channel encoding like ATSC modulator. o Job Functions: Requirement Analysis, Proposal Preparation, High- and Low-level Specs creation, RTL Design/ Verification, Implementation, Pre-Post Silicon Validation, Board Bring-up, Debugging and Documentation Specialties: ASIC, FPGA, VHDL, Verilog, System Verilog, UVM, ARM SoC, AMBA, AXI, NIOS2, Avalon, Matlab, Imaging, Video Processing, DC,Synplify Pro, Xilinx ISE,Altera Quartus

Stackforce AI infers this person is a Semiconductor Verification Expert with extensive experience in ASIC and FPGA design.

Location: Noida, Uttar Pradesh, India

Experience: 23 yrs 1 mo