Silva Khachatryan — Product Manager
[2023/02-to present] “Synopsys Armenia”. "Yerevan, Armenia" “R&D Layout Design manager” SerDes layout design Main duties and responsibilities • Managing and leading of multiple projects of DPHY/CDPHY/CPHY products (extremely low nodes) • Creation and investigation for new architectures of the product. Layout design reviews, etc. • Leading an experienced multi-site analog layout team • Working closely with various teams from different sites (design team, CAD team, release team, etc.) *Layout Design of High Density, High Speed, RF, Embedded SRAM Memory Systems * Layout Design of Logic cell Libraries * Layout design of Analog and Mixed Signal Circuits (DAC, ADC, PLL, OpAmp, etc) * QA and Verification flows for Memory/logic/analog Layouts * Physical Verification and Debug
Stackforce AI infers this person is a Semiconductor Design Expert with strong leadership in VLSI layout management.
Location: Yerevan, Armenia
Experience: 15 yrs 2 mos
Skills
- Vlsi
- Physical Verification
- Analog Circuit Design
Career Highlights
- Expert in managing multi-site analog layout teams.
- Proficient in VLSI and Physical Verification.
- Extensive experience in layout design for high-speed circuits.
Work Experience
Synopsys Inc
A&MS R&D Layout Manager (2 yrs 4 mos)
Supervisor (10 mos)
Team Lead Manager (10 mos)
R&D Engineer Sr (5 mos)
R&D Engineer 2 (6 yrs 7 mos)
R&D Engineer (3 yrs 11 mos)
Intern (4 mos)
Education
MS at Synopsys Armenia Educational Department (SEUA)
BS at Synopsys Armenia Educational Department (SEUA)
at N114 named after Khachik Dashtenc