Keshav Yadav

Software Engineer

Gurugram, Haryana, India2 yrs 2 mos experience

Highly Stable

Key Highlights

Strong foundation in VLSI design and verification.
Hands-on experience with cutting-edge VLSI projects.
Proficient in multiple programming languages and methodologies.

Stackforce AI infers this person is a VLSI design and verification specialist with strong software engineering skills.

Contact

Skills

Core Skills

VerilogUniversal Verification Methodology (uvm)

Other Skills

C++CDCLinuxDigital Circuit DesignSystemVerilogPython (Programming Language)JenkinsDigital system designStatic Timing AnalysisQuestaSimC (Programming Language)Object-Oriented Programming (OOP)PerlElectronic EngineeringNetwork Theory

About

Passionate VLSI fresher currently working as software engineer at Cadence. With a strong foundation in VLSI design and verification, I am enthusiastic about pushing the boundaries of technological innovation. During my Internship, I have been actively involved in cutting-edge projects, collaborating with experienced professionals in the field. My academic background has equipped me with a solid understanding of digital design methodologies, RTL coding, and Verification. 𝗟𝗲𝘁'𝘀 𝘀𝗵𝗮𝗽𝗲 𝘁𝗵𝗲 𝗳𝘂𝘁𝘂𝗿𝗲 𝗼𝗳 𝗲𝗹𝗲𝗰𝘁𝗿𝗼𝗻𝗶𝗰𝘀 𝘁𝗼𝗴𝗲𝘁𝗵𝗲𝗿!

Experience

2 yrs 2 mos

Total Experience

2 yrs 2 mos

Average Tenure

2 yrs 2 mos

Current Experience

Cadence

2 roles

Software Engineer 2

Jan 2026 – Present · 4 mos · Noida, Uttar Pradesh, India

Software Engineer 1

Mar 2024 – Jan 2026 · 1 yr 10 mos · Noida, Uttar Pradesh, India

VerilogC++

3st technologies

Design & Verification Trainee

Aug 2023 – Feb 2024 · 6 mos · Delhi, India · On-site

Pursuing training in Design and verification domain. Practical knowledge of Front-end VLSI design and
Verification techniques. The training includes Digital Electronics, STA, CDC, Verilog, System Verilog,
UVM ,C/C++ ,Linux and hands-on projects.

Universal Verification Methodology (UVM)CDC