Anuj Grover — Head of Design
I joined STMicroelectronics as a project trainee with Memory Design team in 1999. I enjoyed the experience so much that I decided to join the same group as a designer as soon as I completed my graduation at IIT Delhi. At IIT Delhi, I got to work closely with Prof. S.D. Joshi, Prof. J.K. Chatterjee and many others. My B.Tech Project was with Prof. Subrat Kar on SDH/SONET switches by Transwitch. After working for about 2yrs 3months, I pursued higher technical education at University of California, San Diego towards a Masters in Science Degree. At UCSD, I worked with Prof. Andrew Kahng on reliability metric and Prof. Yuan Taur on device design. I joined La Jolla Advanced Design Center of STMicroelectronics to work on a project of Scalable Memory Architectures with Thomas Zounes. I returned to join STMicroelectronics at NOIDA to work on Memory Design. Currently, I am involved in embedded memory design and related solutions design in UTBB FDSOI at 28nm. I am also responsible for facilitating RnD relationships with partners and universities to explore relevant future solutions related to SRAM subsystems. Through all these years, I have also been involved in activities related to Community Service through various avenues at ST. I am currently the convener of SMILES - Smart Minds Influencing Life and Earth Sustainably - at ST Greater NOIDA Specialties: Memory (SRAM/ ROM) Design - Architecture, Circuit, Verification, Silicon Qualification etc. Trainer - "From Creativity to Innovation"; "Science and Technology" Non-profits Mentoring / Coaching subordinates
Stackforce AI infers this person is a Semiconductor Design Expert with a focus on Memory Solutions and Education.
Location: South Delhi, Delhi, India
Experience: 25 yrs 10 mos
Skills
- Memory Design
- Project Management
Career Highlights
- Expert in Memory Design and Architecture.
- Strong background in RnD collaborations and prototyping.
- Experienced educator and mentor in engineering.
Work Experience
Indraprastha Institute of Information Technology, Delhi
Head, Centre for Intelligent Product Development (CiPD) (2 yrs 5 mos)
Associate Dean - IRD (2 yrs 2 mos)
Chairman, Institute Innovation Council (2 yrs 4 mos)
Associate Professor (7 yrs 2 mos)
Guest Faculty (5 yrs 9 mos)
STMicroelectronics
Trainee (7 mos)
Principal Engineer (18 yrs 8 mos)
Trainee (2 mos)
Education
Diploma at Massachusetts Institute of Technology
Certification at Tufts University
PhD at Indian Institute of Technology, Delhi
MS at UC San Diego
B.Tech at Indian Institute of Technology, Delhi
Schooling at Mata Jai Kaur Public School