Harinath Reddy

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expertise in DFT methodologies and ASIC design.
  • Proficient in industry-standard tools like Synopsys and Tessent.
  • Strong foundation in VLSI design and embedded systems.
Stackforce AI infers this person is a DFT Engineer specializing in ASIC design and verification.

Contact

harinathreddykothinti@gmail.comLinkedIn

Skills

Core Skills

DftAsic

Other Skills

Synopsis TetraMaxSynopsys PrimetimeQuality ChecksYield improvementTessent-ATPGSpyglassPost silicon debugPLL programming & OCC VerificationIEEE 1500Coverage analysis and improvementATPG and Verification at full chip levelNo-timing & SDF based simulationsIEEE 1149.1 (JTAG) & IEEE 1687 (IJTAG) ProtocolsScan synthesis and scan-chain analysis/stitchingVHDL

Experience

3 yrs 9 mos
Total Experience
3 yrs 9 mos
Average Tenure
3 yrs 9 mos
Current Experience

Mediatek

2 roles

Senior DFT Engineer

Jul 2023 – Present · 2 yrs 9 mos · Bengaluru, Karnataka, India

Synopsis TetraMaxSynopsys PrimetimeDFTASIC

DFT Intern

Jul 2022 – Jul 2023 · 1 yr · Bengaluru, Karnataka, India

Electronics corporation of india limited (ecil), department of atomic energy, government of india.

Intern

May 2018 – Jun 2018 · 1 mo · Hyderabad, Telangana, India

Education

Maulana Azad National Institute of Technology

Master of Technology - MTech — VLSI Design and Embedded System

Jan 2021 – Jan 2023

TKR College of Engineering and Technology

Bachelor of Technology - BTech — ECE

Jan 2015 – Jan 2019

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