Debdut Biswas

Software Engineer

Kolkata, West Bengal, India6 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in high-speed PLL design for SerDes applications.
  • Strong background in frequency synthesizers and wireless transceivers.
  • Proficient in multiple VLSI design tools and methodologies.
Stackforce AI infers this person is a specialist in Analog RF VLSI design within the semiconductor industry.

Contact

LinkedIn

Skills

Other Skills

Frequency SynthesizersPhase-Locked Loop (PLL)Very-Large-Scale Integration (VLSI)Analog Circuit DesignApplication-Specific Integrated Circuits (ASIC)VHDLMatlabCadence VirtuosoCMOSOrCADVerilog-AMixed Signal VLSI Design

About

I am currently working in Terminus Circuits Bangalore designing high speed PLLs for SerDes applications. My research Interests include frequency synthesizers and wireless transceivers.

Experience

6 yrs 8 mos
Total Experience
2 yrs 2 mos
Average Tenure
3 yrs 10 mos
Current Experience

Mediatek

Staff Engineer

Jun 2022 – Present · 3 yrs 10 mos · Bengaluru, Karnataka, India · On-site

Cadence design systems

Lead Design Engineer

Dec 2020 – May 2022 · 1 yr 5 mos · Noida, Uttar Pradesh, India · Remote

Terminus circuits pvt ltd

Member Technical Staff

Jun 2019 – Nov 2020 · 1 yr 5 mos · Bengaluru, Karnataka, India

Education

Indian Institute of Technology, Kharagpur

Doctor of Philosophy (Ph.D.) — Analog/RF VLSI Circuits

Jan 2014 – Jan 2020

West Bengal University of Technology, Kolkata

Master of Technology - MTech — Microelectronics & VLSI

Jan 2011 – Jan 2013

West Bengal University of Technology, Kolkata

Bachelor of Technology - BTech — Electronics and Communication Engineering

Jan 2006 – Jan 2010

South Point High School, Kolkata

Higher Secondary — Bio-science

Jan 1992 – Jan 2006

Stackforce found 100+ more professionals with Frequency Synthesizers & Phase-Locked Loop (PLL)

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