Parul Sharma

Director of Engineering

Bengaluru, Karnataka, India22 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Proven track record in managing high-performance teams.
Expert in delivering complex SoCs under tight timelines.
Strong catalyst for process improvements and efficiency.

Stackforce AI infers this person is a Semiconductor Engineering Leader with expertise in SoC verification and project management.

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Skills

Core Skills

Soc VerificationProject ManagementDebug Architecture

Other Skills

Risk managementInterdepartmental collaborationCollaborationCo-Chip leadershipTechnical leadershipSemiconductorsManagementDebuggingVerilogSystem VerilogUniversal Verification Methodology (UVM)SoC IntegrationFormal VerificationCC++

About

Driven engineering leader with vast experience in world-class semiconductor organizations. Proven track record of managing high performance teams, delivering first-time-right very-complex SoCs under high pressure and tight timelines, typical of business. Result oriented leader with focus on continuous process improvements, involving inter-departmental teams and global resources. • Develop, manage and energize large high-performance SoC-verification teams • Establish processes, dashboards and metrics for quality project delivery in 6-9 months Spec-to-GDS cycles • Strong risk-identification, mitigation and forecast skills • Strong catalyst for driving change in organization for efficiency & competence • SoC Verification management of ARM/PowerPC/StarCore based multi core complex SoCs with coherent interconnects and 100s of peripherals • Low-Power Wireless, Wifi and large Networking SoCs verification • Expert in driving projects with parallelly developing IPs/Sub-systems • H/w-S/w co-verification, Emulation & FPGA friendly verification development • Interdisciplinary collaboration with functional verticals in diverse cultural settings across multiple timezones (India, USA, Canada, EU, China)

Experience

22 yrs 3 mos

Total Experience

5 yrs 6 mos

Average Tenure

6 yrs 4 mos

Current Experience

Intel corporation

Director of Engineering

Dec 2019 – Present · 6 yrs 4 mos · Greater Bengaluru Area

Nxp semiconductors

Senior Engineering Manager

Mar 2017 – Dec 2019 · 2 yrs 9 mos · Noida Area, India

Manage execution and quality of SoC verification of aggressive, first-pass, complex SoCs.
Outlining structured, clear and transparent status, issues, risks and help-needed items to executive management
Interface with Core Team, Marketing, IP teams and Program Management for verification function.
Collaborate with other functional verticals such as Architecture, FE, BE and Emulation/ Software for managing dependencies & seamless handover. Shortened the RTL logic freeze cycle from typical 5 months to 3.5 months.
Manage verification process improvements and standardization for reuse.
Drive patent and publications submission across verticals for business unit, steadily increasing the quality & quantity year on year

SoC verificationProject ManagementRisk managementInterdepartmental collaborationSoC Verification

Nxp acquires freescale semiconductor

3 roles

Engineering Manager

Apr 2013 – Mar 2016 · 2 yrs 11 mos · Noida, Uttar Pradesh, India

SoC verification manager for multiple state-of-the-art multi-core Wireless SoCs with DSP and Apps MCU on single chip.
Delivered multiple very small size (12mm2, c28) to fairly large (160mm2, c28) SoCs ahead of schedule with 1.0 success
Co-Chip-Lead for frontend design & verification.

SoC verificationCo-Chip leadershipProject ManagementSoC Verification

Senior Member Of Technical Staff

Promoted

Apr 2011 – Mar 2013 · 1 yr 11 mos · Noida, Uttar Pradesh, India

Technical lead for Cellular Products SoC Verification
Architect for Nexus and ARM Coresight Debug architecture for SoCs. Created mixed architecture combining Nexus and CoreSight components enabling resue of several in-house IPs with standard IPs from ARM

SoC verificationDebug architectureTechnical leadershipSoC VerificationDebug Architecture