POOJA DINANI

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expert in Static Timing Analysis and Timing Closure.
  • Proficient in leading synthesis projects.
  • Strong teamwork and engineering skills.
Stackforce AI infers this person is a VLSI Engineering specialist with expertise in timing analysis and synthesis.

Contact

Skills

Core Skills

Static Timing AnalysisTiming Closure

Other Skills

Synopsys PrimetimeCadence EncounterSynopsys Design CompilerLogic SynthesisEngineeringTeamworkResearchEnglish

Experience

7 yrs 9 mos
Total Experience
7 yrs 9 mos
Average Tenure
7 yrs 9 mos
Current Experience

Mediatek

STA & Synthesis Engineer

Jul 2018Present · 7 yrs 9 mos · Bengaluru 560037, Karnataka · On-site

Static Timing AnalysisTiming Closure

Education

National Institute of Technology, Tiruchirappalli

Master of Technology - MTech — VLSI

Jul 2016Jun 2018

Stackforce found 100+ more professionals with Static Timing Analysis & Timing Closure

Explore similar profiles based on matching skills and experience